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Commit 7adb7695 authored by Michael Turquette's avatar Michael Turquette
Browse files

Merge branch 'clk-sunxi-ng' into clk-next

parents a0649829 0577e485
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Allwinner Clock Control Unit Binding
------------------------------------

Required properties :
- compatible: must contain one of the following compatible:
		- "allwinner,sun8i-h3-ccu"

- reg: Must contain the registers base address and length
- clocks: phandle to the oscillators feeding the CCU. Two are needed:
  - "hosc": the high frequency oscillator (usually at 24MHz)
  - "losc": the low frequency oscillator (usually at 32kHz)
- clock-names: Must contain the clock names described just above
- #clock-cells : must contain 1
- #reset-cells : must contain 1

Example:
ccu: clock@01c20000 {
	compatible = "allwinner,sun8i-h3-ccu";
	reg = <0x01c20000 0x400>;
	clocks = <&osc24M>, <&osc32k>;
	clock-names = "hosc", "losc";
	#clock-cells = <1>;
	#reset-cells = <1>;
};
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@@ -214,6 +214,7 @@ source "drivers/clk/mvebu/Kconfig"
source "drivers/clk/qcom/Kconfig"
source "drivers/clk/renesas/Kconfig"
source "drivers/clk/samsung/Kconfig"
source "drivers/clk/sunxi-ng/Kconfig"
source "drivers/clk/tegra/Kconfig"
source "drivers/clk/ti/Kconfig"

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@@ -79,6 +79,7 @@ obj-$(CONFIG_ARCH_SOCFPGA) += socfpga/
obj-$(CONFIG_PLAT_SPEAR)		+= spear/
obj-$(CONFIG_ARCH_STI)			+= st/
obj-$(CONFIG_ARCH_SUNXI)		+= sunxi/
obj-$(CONFIG_ARCH_SUNXI)		+= sunxi-ng/
obj-$(CONFIG_ARCH_TEGRA)		+= tegra/
obj-y					+= ti/
obj-$(CONFIG_ARCH_U8500)		+= ux500/
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config SUNXI_CCU
	bool "Clock support for Allwinner SoCs"
	default ARCH_SUNXI

if SUNXI_CCU

# Base clock types

config SUNXI_CCU_DIV
	bool
	select SUNXI_CCU_MUX

config SUNXI_CCU_FRAC
	bool

config SUNXI_CCU_GATE
	bool

config SUNXI_CCU_MUX
	bool

config SUNXI_CCU_PHASE
	bool

# Multi-factor clocks

config SUNXI_CCU_NK
	bool
	select SUNXI_CCU_GATE

config SUNXI_CCU_NKM
	bool
	select RATIONAL
	select SUNXI_CCU_GATE

config SUNXI_CCU_NKMP
	bool
	select RATIONAL
	select SUNXI_CCU_GATE

config SUNXI_CCU_NM
	bool
	select RATIONAL
	select SUNXI_CCU_FRAC
	select SUNXI_CCU_GATE

config SUNXI_CCU_MP
	bool
	select SUNXI_CCU_GATE
	select SUNXI_CCU_MUX

# SoC Drivers

config SUN8I_H3_CCU
	bool "Support for the Allwinner H3 CCU"
	select SUNXI_CCU_DIV
	select SUNXI_CCU_NK
	select SUNXI_CCU_NKM
	select SUNXI_CCU_NKMP
	select SUNXI_CCU_NM
	select SUNXI_CCU_MP
	select SUNXI_CCU_PHASE
	default ARCH_SUN8I

endif
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# Common objects
obj-$(CONFIG_SUNXI_CCU)		+= ccu_common.o
obj-$(CONFIG_SUNXI_CCU)		+= ccu_reset.o

# Base clock types
obj-$(CONFIG_SUNXI_CCU_DIV)	+= ccu_div.o
obj-$(CONFIG_SUNXI_CCU_FRAC)	+= ccu_frac.o
obj-$(CONFIG_SUNXI_CCU_GATE)	+= ccu_gate.o
obj-$(CONFIG_SUNXI_CCU_MUX)	+= ccu_mux.o
obj-$(CONFIG_SUNXI_CCU_PHASE)	+= ccu_phase.o

# Multi-factor clocks
obj-$(CONFIG_SUNXI_CCU_NK)	+= ccu_nk.o
obj-$(CONFIG_SUNXI_CCU_NKM)	+= ccu_nkm.o
obj-$(CONFIG_SUNXI_CCU_NKMP)	+= ccu_nkmp.o
obj-$(CONFIG_SUNXI_CCU_NM)	+= ccu_nm.o
obj-$(CONFIG_SUNXI_CCU_MP)	+= ccu_mp.o

# SoC support
obj-$(CONFIG_SUN8I_H3_CCU)	+= ccu-sun8i-h3.o
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