Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 7ac52642 authored by Linux Build Service Account's avatar Linux Build Service Account Committed by Gerrit - the friendly Code Review server
Browse files

Merge "ARM: dts: msm: Enable all SSG drivers for msm8937"

parents 2813f973 40c21e07
Loading
Loading
Loading
Loading
+100 −0
Original line number Diff line number Diff line
@@ -1299,6 +1299,106 @@

		status = "disabled";
	};

	qcom_seecom: qseecom@85b00000 {
		compatible = "qcom,qseecom";
		reg = <0x85b00000 0x800000>;
		reg-names = "secapp-region";
		qcom,hlos-num-ce-hw-instances = <1>;
		qcom,hlos-ce-hw-instance = <0>;
		qcom,qsee-ce-hw-instance = <0>;
		qcom,disk-encrypt-pipe-pair = <2>;
		qcom,support-fde;
		qcom,msm-bus,name = "qseecom-noc";
		qcom,msm-bus,num-cases = <4>;
		qcom,msm-bus,num-paths = <1>;
		qcom,support-bus-scaling;
		qcom,msm-bus,vectors-KBps =
			<55 512 0 0>,
			<55 512 0 0>,
			<55 512 120000 1200000>,
			<55 512 393600 3936000>;
		clocks = <&clock_gcc clk_crypto_clk_src>,
			<&clock_gcc clk_gcc_crypto_clk>,
			<&clock_gcc clk_gcc_crypto_ahb_clk>,
			<&clock_gcc clk_gcc_crypto_axi_clk>;
		clock-names = "core_clk_src", "core_clk",
			"iface_clk", "bus_clk";
		qcom,ce-opp-freq = <100000000>;
	};

	qcom_rng: qrng@e3000 {
		compatible = "qcom,msm-rng";
		reg = <0xe3000 0x1000>;
		qcom,msm-rng-iface-clk;
		qcom,no-qrng-config;
		qcom,msm-bus,name = "msm-rng-noc";
		qcom,msm-bus,num-cases = <2>;
		qcom,msm-bus,num-paths = <1>;
		qcom,msm-bus,vectors-KBps =
			<1 618 0 0>,            /* No vote */
			<1 618 0 800>;          /* 100 MB/s */
		clocks = <&clock_gcc clk_gcc_prng_ahb_clk>;
		clock-names = "iface_clk";
	};

	qcom_crypto: qcrypto@720000 {
		compatible = "qcom,qcrypto";
		reg = <0x720000 0x20000>,
			<0x704000 0x20000>;
		reg-names = "crypto-base","crypto-bam-base";
		interrupts = <0 207 0>;
		qcom,bam-pipe-pair = <2>;
		qcom,ce-hw-instance = <0>;
		qcom,ce-device = <0>;
		qcom,ce-hw-shared;
		qcom,clk-mgmt-sus-res;
		qcom,msm-bus,name = "qcrypto-noc";
		qcom,msm-bus,num-cases = <2>;
		qcom,msm-bus,num-paths = <1>;
		qcom,msm-bus,vectors-KBps =
				<55 512 0 0>,
				<55 512 393600 393600>;
		clocks = <&clock_gcc clk_crypto_clk_src>,
			 <&clock_gcc clk_gcc_crypto_clk>,
			 <&clock_gcc clk_gcc_crypto_ahb_clk>,
			 <&clock_gcc clk_gcc_crypto_axi_clk>;
		clock-names = "core_clk_src", "core_clk",
				"iface_clk", "bus_clk";
		qcom,use-sw-aes-cbc-ecb-ctr-algo;
		qcom,use-sw-aes-xts-algo;
		qcom,use-sw-aes-ccm-algo;
		qcom,use-sw-ahash-algo;
		qcom,use-sw-hmac-algo;
		qcom,use-sw-aead-algo;
		qcom,ce-opp-freq = <100000000>;
	};

	qcom_cedev: qcedev@720000 {
		compatible = "qcom,qcedev";
		reg = <0x720000 0x20000>,
			<0x704000 0x20000>;
		reg-names = "crypto-base","crypto-bam-base";
		interrupts = <0 207 0>;
		qcom,bam-pipe-pair = <1>;
		qcom,ce-hw-instance = <0>;
		qcom,ce-device = <0>;
		qcom,ce-hw-shared;
		qcom,msm-bus,name = "qcedev-noc";
		qcom,msm-bus,num-cases = <2>;
		qcom,msm-bus,num-paths = <1>;
		qcom,msm-bus,vectors-KBps =
				<55 512 0 0>,
				<55 512 393600 393600>;
		clocks = <&clock_gcc clk_crypto_clk_src>,
			 <&clock_gcc clk_gcc_crypto_clk>,
			 <&clock_gcc clk_gcc_crypto_ahb_clk>,
			 <&clock_gcc clk_gcc_crypto_axi_clk>;
		clock-names = "core_clk_src", "core_clk",
				"iface_clk", "bus_clk";
		qcom,ce-opp-freq = <100000000>;
	};

};

#include "pm8937-rpm-regulator.dtsi"