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Commit 79bc18e8 authored by Sankaran Nampoothiri's avatar Sankaran Nampoothiri
Browse files

drivers: soc: llcc_perfmon: Sysfs entry perfmon_scid_status



Entry added to show the current capacity of SCID & active state.

Change-Id: I3bb907e6a9704d0852cc8d118c184f6151b1e4e5
Signed-off-by: default avatarSankaran Nampoothiri <snampoot@codeaurora.org>
parent d6ada1e5
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+33 −0
Original line number Diff line number Diff line
@@ -470,12 +470,44 @@ static ssize_t perfmon_start_store(struct device *dev,
	return count;
}

static ssize_t perfmon_scid_status_show(struct device *dev,
		struct device_attribute *attr, char *buf)
{
	struct llcc_perfmon_private *llcc_priv = dev_get_drvdata(dev);
	uint32_t val;
	unsigned int i, offset;
	ssize_t cnt = 0, print;

	for (i = 0; i < SCID_MAX; i++) {
		offset = TRP_SCID_n_STATUS(i);
		llcc_bcast_read(llcc_priv, offset, &val);
		if (val & TRP_SCID_STATUS_ACTIVE_MASK)
			print = snprintf(buf, MAX_STRING_SIZE, "SCID %02d %10s",
					i, "ACTIVE");
		else
			print = snprintf(buf, MAX_STRING_SIZE, "SCID %02d %10s",
					i, "DEACTIVE");

		buf += print;
		cnt += print;

		val = (val & TRP_SCID_STATUS_CURRENT_CAP_MASK)
			>> TRP_SCID_STATUS_CURRENT_CAP_SHIFT;
		print = snprintf(buf, MAX_STRING_SIZE, ",0x%08x\n", val);
		buf += print;
		cnt += print;
	}

	return cnt;
}

static DEVICE_ATTR_RO(perfmon_counter_dump);
static DEVICE_ATTR_WO(perfmon_configure);
static DEVICE_ATTR_WO(perfmon_remove);
static DEVICE_ATTR_WO(perfmon_filter_config);
static DEVICE_ATTR_WO(perfmon_filter_remove);
static DEVICE_ATTR_WO(perfmon_start);
static DEVICE_ATTR_RO(perfmon_scid_status);

static struct attribute *llcc_perfmon_attrs[] = {
	&dev_attr_perfmon_counter_dump.attr,
@@ -484,6 +516,7 @@ static struct attribute *llcc_perfmon_attrs[] = {
	&dev_attr_perfmon_filter_config.attr,
	&dev_attr_perfmon_filter_remove.attr,
	&dev_attr_perfmon_start.attr,
	&dev_attr_perfmon_scid_status.attr,
	NULL,
};

+14 −0
Original line number Diff line number Diff line
@@ -42,6 +42,7 @@
/* TRP */
#define TRP_PROF_FILTER_0_CFG1		(0x024004)
#define TRP_PROF_EVENT_n_CFG(n)		(0x024020 + 4 * n)
#define TRP_SCID_n_STATUS(n)		(0x000004 + 0x1000 * n)

/* DRP */
#define DRP_PROF_EVENT_n_CFG(n)		(0x044010 + 4 * n)
@@ -180,4 +181,17 @@
#define TRP_PROFTAG_MASK_SHIFT		(28)
#define TRP_PROFTAG_MASK_MASK		GENMASK(TRP_PROFTAG_MASK_SHIFT + 1,\
						TRP_PROFTAG_MASK_SHIFT)

#define TRP_SCID_STATUS_ACTIVE_SHIFT		(0)
#define TRP_SCID_STATUS_ACTIVE_MASK		GENMASK( \
						TRP_SCID_STATUS_ACTIVE_SHIFT \
						+ 0, \
						TRP_SCID_STATUS_ACTIVE_SHIFT)
#define TRP_SCID_STATUS_DEACTIVE_SHIFT		(1)
#define TRP_SCID_STATUS_CURRENT_CAP_SHIFT	(16)
#define TRP_SCID_STATUS_CURRENT_CAP_MASK	GENMASK( \
					TRP_SCID_STATUS_CURRENT_CAP_SHIFT \
					+ 13, \
					TRP_SCID_STATUS_CURRENT_CAP_SHIFT)

#endif /* _SOC_QCOM_LLCC_PERFMON_H_ */