Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 79afecfa authored by Aneesh Kumar's avatar Aneesh Kumar Committed by Linus Torvalds
Browse files

[PATCH] Fix typos in Documentation/memory-barriers.txt



Fix some typos in Documentation/memory-barriers.txt

Signed-off-by: default avatarAneesh Kumar K.V <aneesh.kumar@gmail.com>
Cc: David Howells <dhowells@redhat.com>
Signed-off-by: default avatarAndrew Morton <akpm@osdl.org>
Signed-off-by: default avatarLinus Torvalds <torvalds@osdl.org>
parent bfe2e934
Loading
Loading
Loading
Loading
+2 −2
Original line number Diff line number Diff line
@@ -1031,7 +1031,7 @@ conflict on any particular lock.
LOCKS VS MEMORY ACCESSES
------------------------

Consider the following: the system has a pair of spinlocks (N) and (Q), and
Consider the following: the system has a pair of spinlocks (M) and (Q), and
three CPUs; then should the following sequence of events occur:

	CPU 1				CPU 2
@@ -1678,7 +1678,7 @@ CPU's caches by some other cache event:
	smp_wmb();
	<A:modify v=2>	<C:busy>
			<C:queue v=2>
	p = &b;		q = p;
	p = &v;		q = p;
			<D:request p>
	<B:modify p=&v>	<D:commit p=&v>
		  	<D:read p>