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Commit 78e68d36 authored by Imre Deak's avatar Imre Deak Committed by Jani Nikula
Browse files

drm/i915: move RPS PM_IER enabling to gen6_enable_rps_interrupts 



Paulo noticed that we don't enable RPS interrupts via PM_IER in
gen6_enable_rps_interrupts(). This wasn't a problem so far, since the
only place we disabled RPS interrupts was during system/runtime suspend
and after that we reenable all interrupts in the IRQ pre/postinstall
hooks.

In the next patch we'll disable/reenable RPS interrupts during GPU reset
too, but not call IRQ uninstall, pre/postinstall hooks, so there the
above wouldn't work. The logical place for programming PM_IER is
gen6_enable_rps_interrupts() and this also makes the function more
symmetric with gen6_disable_rps_interrupts(), so move the programming
there from the postinstall hooks.

Note that these changes don't affect the ILK RPS interrupt code, which
could be sanitized in a similar way. But that can be done as a
follow-up.

Credits-to: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: default avatarImre Deak <imre.deak@intel.com>
Reviewed-by: default avatarPaulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: default avatarJani Nikula <jani.nikula@intel.com>
parent c352d1ba

drivers/gpu/drm/i915/i915_irq.c

+13 −3
Original line number Diff line number Diff line
@@ -281,10 +281,14 @@ void gen6_enable_rps_interrupts(struct drm_device *dev) 
	struct drm_i915_private *dev_priv = dev->dev_private;



	spin_lock_irq(&dev_priv->irq_lock);



	WARN_ON(dev_priv->rps.pm_iir);

	WARN_ON(I915_READ(gen6_pm_iir(dev_priv)) & dev_priv->pm_rps_events);

	dev_priv->rps.interrupts_enabled = true;

	I915_WRITE(gen6_pm_ier(dev_priv), I915_READ(gen6_pm_ier(dev_priv)) |

				dev_priv->pm_rps_events);

	gen6_enable_pm_irq(dev_priv, dev_priv->pm_rps_events);



	spin_unlock_irq(&dev_priv->irq_lock);

}
@@ -3307,8 +3311,10 @@ static void gen5_gt_irq_postinstall(struct drm_device *dev) 
	GEN5_IRQ_INIT(GT, dev_priv->gt_irq_mask, gt_irqs);



	if (INTEL_INFO(dev)->gen >= 6) {

		pm_irqs |= dev_priv->pm_rps_events;



		/*

		 * RPS interrupts will get enabled/disabled on demand when RPS

		 * itself is enabled/disabled.

		 */

		if (HAS_VEBOX(dev))

			pm_irqs |= PM_VEBOX_USER_INTERRUPT;
@@ -3520,7 +3526,11 @@ static void gen8_gt_irq_postinstall(struct drm_i915_private *dev_priv) 
	dev_priv->pm_irq_mask = 0xffffffff;

	GEN8_IRQ_INIT_NDX(GT, 0, ~gt_interrupts[0], gt_interrupts[0]);

	GEN8_IRQ_INIT_NDX(GT, 1, ~gt_interrupts[1], gt_interrupts[1]);

	GEN8_IRQ_INIT_NDX(GT, 2, dev_priv->pm_irq_mask, dev_priv->pm_rps_events);

	/*

	 * RPS interrupts will get enabled/disabled on demand when RPS itself

	 * is enabled/disabled.

	 */

	GEN8_IRQ_INIT_NDX(GT, 2, dev_priv->pm_irq_mask, 0);

	GEN8_IRQ_INIT_NDX(GT, 3, ~gt_interrupts[3], gt_interrupts[3]);

}