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Commit 78e0f02a authored by Ajay Singh Parmar's avatar Ajay Singh Parmar Committed by Narendra Muppalla
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clk: msm: hdmi: add 8998 hdmi pll calculator and clocks



Add PLL and PHY programming for HDMI. Dynamically calculate
the register values to be programmed for a given pixel clock.

CRs-Fixed: 1022772
Change-Id: Ibf7877eb6edd29baefee57bc12188989d897d47e
Signed-off-by: default avatarAjay Singh Parmar <aparmar@codeaurora.org>
Signed-off-by: default avatarTatenda Chipeperekwa <tatendac@codeaurora.org>
Signed-off-by: default avatarNarendra Muppalla <narendram@codeaurora.org>
parent 601c3a96
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@@ -6,3 +6,4 @@ obj-$(CONFIG_MSM_MDSS_PLL) += mdss-dsi-pll-8998.o
obj-$(CONFIG_MSM_MDSS_PLL) += mdss-dp-pll-8998.o
obj-$(CONFIG_MSM_MDSS_PLL) += mdss-dp-pll-8998-util.o
obj-$(CONFIG_MSM_MDSS_PLL) += mdss-hdmi-pll-8996.o
obj-$(CONFIG_MSM_MDSS_PLL) += mdss-hdmi-pll-8998.o
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/* Copyright (c) 2012-2015, The Linux Foundation. All rights reserved.
/* Copyright (c) 2012-2017, The Linux Foundation. All rights reserved.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 and
@@ -33,6 +33,11 @@ struct hdmi_pll_vco_clk {
	struct clk	c;
};

static inline struct hdmi_pll_vco_clk *to_hdmi_vco_clk(struct clk *clk)
{
	return container_of(clk, struct hdmi_pll_vco_clk, c);
}

int hdmi_pll_clock_register(struct platform_device *pdev,
				struct mdss_pll_resources *pll_res);

@@ -50,4 +55,7 @@ int hdmi_8996_v3_pll_clock_register(struct platform_device *pdev,

int hdmi_8996_v3_1p8_pll_clock_register(struct platform_device *pdev,
				 struct mdss_pll_resources *pll_res);

int hdmi_8998_pll_clock_register(struct platform_device *pdev,
				   struct mdss_pll_resources *pll_res);
#endif
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@@ -37,6 +37,7 @@ enum {
	MDSS_HDMI_PLL_8996_V2,
	MDSS_HDMI_PLL_8996_V3,
	MDSS_HDMI_PLL_8996_V3_1_8,
	MDSS_HDMI_PLL_8998,
	MDSS_UNKNOWN_PLL,
};