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Commit 78a54c4d authored by Paul Burton's avatar Paul Burton Committed by Ralf Baechle
Browse files

MIPS: CM, CPC: Ensure core-other GCRs reflect the correct core 



Ensure the update to which core the core-other GCR regions reflect has
taken place before any core-other GCRs are accessed by placing a memory
barrier (sync instruction) between the write to the core-other registers
and any such GCR accesses.

Signed-off-by: default avatarPaul Burton <paul.burton@imgtec.com>
Cc: linux-mips@linux-mips.org
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: linux-kernel@vger.kernel.org
Cc: Markos Chandras <markos.chandras@imgtec.com>
Patchwork: https://patchwork.linux-mips.org/patch/11209/


Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent 4ede3161

arch/mips/kernel/mips-cm.c

+6 −0
Original line number Diff line number Diff line
@@ -278,6 +278,12 @@ void mips_cm_lock_other(unsigned int core, unsigned int vp) 
	}



	write_gcr_cl_other(val);



	/*

	 * Ensure the core-other region reflects the appropriate core &

	 * VP before any accesses to it occur.

	 */

	mb();

}



void mips_cm_unlock_other(void)

arch/mips/kernel/mips-cpc.c

+6 −0
Original line number Diff line number Diff line
@@ -76,6 +76,12 @@ void mips_cpc_lock_other(unsigned int core) 
	spin_lock_irqsave(&per_cpu(cpc_core_lock, curr_core),

			  per_cpu(cpc_core_lock_flags, curr_core));

	write_cpc_cl_other(core << CPC_Cx_OTHER_CORENUM_SHF);



	/*

	 * Ensure the core-other region reflects the appropriate core &

	 * VP before any accesses to it occur.

	 */

	mb();

}



void mips_cpc_unlock_other(void)