Loading arch/arm64/boot/dts/qcom/sdm429.dtsi +20 −3 Original line number Diff line number Diff line Loading @@ -60,7 +60,8 @@ < 1497600 >, < 1708800 >, < 1804800 >, < 1958400 >; < 1958400 >, < 2016000 >; }; /delete-node/ devfreq-cpufreq; Loading @@ -73,7 +74,8 @@ < 1497600 5712 >, < 1708800 6445 >, < 1804800 7104 >, < 1958400 7104 >; < 1958400 7104 >, < 2016000 7104 >; }; cci-cpufreq { Loading @@ -84,7 +86,8 @@ < 1497600 400000 >, < 1708800 533000 >, < 1804800 576000 >, < 1958400 576000 >; < 1958400 576000 >, < 2016000 576000 >; }; mincpubw-cpufreq { Loading Loading @@ -203,6 +206,20 @@ < 400000000 1>, < 533333333 3>; qcom,speed4-bin-v0-c1 = < 0 0>, < 960000000 1>, < 1305600000 1>, < 1497600000 2>, < 1708800000 3>, < 1958400000 5>, < 2016000000 6>; qcom,speed4-bin-v0-cci = < 0 0>, < 400000000 1>, < 533333333 3>; #clock-cells = <1>; }; Loading arch/arm64/boot/dts/qcom/sdm439.dtsi +28 −3 Original line number Diff line number Diff line Loading @@ -55,7 +55,8 @@ < 1497600 >, < 1708800 >, < 1804800 >, < 1958400 >; < 1958400 >, < 2016000 >; qcom,cpufreq-table-4 = < 768000 >, Loading Loading @@ -128,7 +129,8 @@ < 1497600 5712 >, < 1708800 6445 >, < 1804800 7104 >, < 1958400 7104 >; < 1958400 7104 >, < 2016000 7104 >; cpu-to-dev-map-4 = < 768000 2929 >, < 998400 5053 >, Loading @@ -145,7 +147,8 @@ < 1497600 400000 >, < 1708800 533000 >, < 1804800 576000 >, < 1958400 576000 >; < 1958400 576000 >, < 2016000 576000 >; cpu-to-dev-map-4 = < 768000 400000 >, < 998400 400000 >, Loading Loading @@ -325,6 +328,28 @@ < 0 0>, < 400000000 1>, < 533333333 3>; qcom,speed4-bin-v0-c0 = < 0 0>, < 768000000 1>, < 998400000 1>, < 1171200000 2>, < 1305600000 3>, < 1459200000 5>; qcom,speed4-bin-v0-c1 = < 0 0>, < 960000000 1>, < 1305600000 1>, < 1497600000 2>, < 1708800000 3>, < 1958400000 5>, < 2016000000 6>; qcom,speed4-bin-v0-cci = < 0 0>, < 400000000 1>, < 533333333 3>; }; &clock_gcc { Loading drivers/clk/msm/clock-gcc-8952.c +2 −1 Original line number Diff line number Diff line Loading @@ -274,6 +274,7 @@ static struct pll_freq_tbl apcs_c1_pll_freq[] = { F_APCS_PLL(1708800000, 89, 0x0, 0x1, 0x0, 0x0, 0x0), F_APCS_PLL(1804800000, 94, 0x0, 0x1, 0x0, 0x0, 0x0), F_APCS_PLL(1958400000, 102, 0x0, 0x1, 0x0, 0x0, 0x0), F_APCS_PLL(2016000000, 105, 0x0, 0x1, 0x0, 0x0, 0x0), }; static struct pll_clk a53ss_c1_pll = { Loading Loading @@ -304,7 +305,7 @@ static struct pll_clk a53ss_c1_pll = { .vdd_class = &vdd_hf_pll, .fmax = (unsigned long [VDD_HF_PLL_NUM]) { [VDD_HF_PLL_SVS] = 1000000000, [VDD_HF_PLL_NOM] = 2000000000, [VDD_HF_PLL_NOM] = 2020000000, }, .num_fmax = VDD_HF_PLL_NUM, CLK_INIT(a53ss_c1_pll.c), Loading Loading
arch/arm64/boot/dts/qcom/sdm429.dtsi +20 −3 Original line number Diff line number Diff line Loading @@ -60,7 +60,8 @@ < 1497600 >, < 1708800 >, < 1804800 >, < 1958400 >; < 1958400 >, < 2016000 >; }; /delete-node/ devfreq-cpufreq; Loading @@ -73,7 +74,8 @@ < 1497600 5712 >, < 1708800 6445 >, < 1804800 7104 >, < 1958400 7104 >; < 1958400 7104 >, < 2016000 7104 >; }; cci-cpufreq { Loading @@ -84,7 +86,8 @@ < 1497600 400000 >, < 1708800 533000 >, < 1804800 576000 >, < 1958400 576000 >; < 1958400 576000 >, < 2016000 576000 >; }; mincpubw-cpufreq { Loading Loading @@ -203,6 +206,20 @@ < 400000000 1>, < 533333333 3>; qcom,speed4-bin-v0-c1 = < 0 0>, < 960000000 1>, < 1305600000 1>, < 1497600000 2>, < 1708800000 3>, < 1958400000 5>, < 2016000000 6>; qcom,speed4-bin-v0-cci = < 0 0>, < 400000000 1>, < 533333333 3>; #clock-cells = <1>; }; Loading
arch/arm64/boot/dts/qcom/sdm439.dtsi +28 −3 Original line number Diff line number Diff line Loading @@ -55,7 +55,8 @@ < 1497600 >, < 1708800 >, < 1804800 >, < 1958400 >; < 1958400 >, < 2016000 >; qcom,cpufreq-table-4 = < 768000 >, Loading Loading @@ -128,7 +129,8 @@ < 1497600 5712 >, < 1708800 6445 >, < 1804800 7104 >, < 1958400 7104 >; < 1958400 7104 >, < 2016000 7104 >; cpu-to-dev-map-4 = < 768000 2929 >, < 998400 5053 >, Loading @@ -145,7 +147,8 @@ < 1497600 400000 >, < 1708800 533000 >, < 1804800 576000 >, < 1958400 576000 >; < 1958400 576000 >, < 2016000 576000 >; cpu-to-dev-map-4 = < 768000 400000 >, < 998400 400000 >, Loading Loading @@ -325,6 +328,28 @@ < 0 0>, < 400000000 1>, < 533333333 3>; qcom,speed4-bin-v0-c0 = < 0 0>, < 768000000 1>, < 998400000 1>, < 1171200000 2>, < 1305600000 3>, < 1459200000 5>; qcom,speed4-bin-v0-c1 = < 0 0>, < 960000000 1>, < 1305600000 1>, < 1497600000 2>, < 1708800000 3>, < 1958400000 5>, < 2016000000 6>; qcom,speed4-bin-v0-cci = < 0 0>, < 400000000 1>, < 533333333 3>; }; &clock_gcc { Loading
drivers/clk/msm/clock-gcc-8952.c +2 −1 Original line number Diff line number Diff line Loading @@ -274,6 +274,7 @@ static struct pll_freq_tbl apcs_c1_pll_freq[] = { F_APCS_PLL(1708800000, 89, 0x0, 0x1, 0x0, 0x0, 0x0), F_APCS_PLL(1804800000, 94, 0x0, 0x1, 0x0, 0x0, 0x0), F_APCS_PLL(1958400000, 102, 0x0, 0x1, 0x0, 0x0, 0x0), F_APCS_PLL(2016000000, 105, 0x0, 0x1, 0x0, 0x0, 0x0), }; static struct pll_clk a53ss_c1_pll = { Loading Loading @@ -304,7 +305,7 @@ static struct pll_clk a53ss_c1_pll = { .vdd_class = &vdd_hf_pll, .fmax = (unsigned long [VDD_HF_PLL_NUM]) { [VDD_HF_PLL_SVS] = 1000000000, [VDD_HF_PLL_NOM] = 2000000000, [VDD_HF_PLL_NOM] = 2020000000, }, .num_fmax = VDD_HF_PLL_NUM, CLK_INIT(a53ss_c1_pll.c), Loading