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Commit 7811a324 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'x86-fixes-for-linus' of... 

Merge branch 'x86-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip

* 'x86-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:
  x86, UV: Set DELIVERY_MODE=4 for vector=NMI_VECTOR in uv_hub_send_ipi()
  x86, UV: Fix and clean up bau code to use uv_gpa_to_pnode()
  x86: Don't print number of MCE banks for every CPU
  x86, UV: Fix information in __uv_hub_info structure
  x86: Document linker script ASSERT() quirk
parents c896a2e0 02dd0a06

arch/x86/boot/setup.ld

+3 −0
Original line number Diff line number Diff line
@@ -53,6 +53,9 @@ SECTIONS 


	/DISCARD/ : { *(.note*) }



	/*

	 * The ASSERT() sink to . is intentional, for binutils 2.14 compatibility:

	 */

	. = ASSERT(_end <= 0x8000, "Setup too big!");

	. = ASSERT(hdr == 0x1f1, "The setup header has the wrong offset!");

	/* Necessary for the very-old-loader check to work... */

arch/x86/include/asm/uv/uv_hub.h

+22 −1
Original line number Diff line number Diff line
@@ -19,6 +19,8 @@ 
#include <asm/types.h>

#include <asm/percpu.h>

#include <asm/uv/uv_mmrs.h>

#include <asm/irq_vectors.h>

#include <asm/io_apic.h>





/*
@@ -114,7 +116,7 @@ 
/*

 * The largest possible NASID of a C or M brick (+ 2)

 */

#define UV_MAX_NASID_VALUE	(UV_MAX_NUMALINK_NODES * 2)

#define UV_MAX_NASID_VALUE	(UV_MAX_NUMALINK_BLADES * 2)



struct uv_scir_s {

	struct timer_list timer;
@@ -230,6 +232,20 @@ static inline unsigned long uv_gpa(void *v) 
	return uv_soc_phys_ram_to_gpa(__pa(v));

}



/* gnode -> pnode */

static inline unsigned long uv_gpa_to_gnode(unsigned long gpa)

{

	return gpa >> uv_hub_info->m_val;

}



/* gpa -> pnode */

static inline int uv_gpa_to_pnode(unsigned long gpa)

{

	unsigned long n_mask = (1UL << uv_hub_info->n_val) - 1;



	return uv_gpa_to_gnode(gpa) & n_mask;

}



/* pnode, offset --> socket virtual */

static inline void *uv_pnode_offset_to_vaddr(int pnode, unsigned long offset)

{
@@ -421,9 +437,14 @@ static inline void uv_set_cpu_scir_bits(int cpu, unsigned char value) 
static inline void uv_hub_send_ipi(int pnode, int apicid, int vector)

{

	unsigned long val;

	unsigned long dmode = dest_Fixed;



	if (vector == NMI_VECTOR)

		dmode = dest_NMI;



	val = (1UL << UVH_IPI_INT_SEND_SHFT) |

			((apicid) << UVH_IPI_INT_APIC_ID_SHFT) |

			(dmode << UVH_IPI_INT_DELIVERY_MODE_SHFT) |

			(vector << UVH_IPI_INT_VECTOR_SHFT);

	uv_write_global_mmr64(pnode, UVH_IPI_INT, val);

}

arch/x86/kernel/acpi/realmode/wakeup.lds.S

+3 −0
Original line number Diff line number Diff line
@@ -57,5 +57,8 @@ SECTIONS 
		*(.note*)

	}



	/*

	 * The ASSERT() sink to . is intentional, for binutils 2.14 compatibility:

	 */

	. = ASSERT(_end <= WAKEUP_SIZE, "Wakeup too big!");

}

arch/x86/kernel/apic/x2apic_uv_x.c

+4 −4
Original line number Diff line number Diff line
@@ -352,14 +352,14 @@ static __init void get_lowmem_redirect(unsigned long *base, unsigned long *size) 


	for (i = 0; i < ARRAY_SIZE(redir_addrs); i++) {

		alias.v = uv_read_local_mmr(redir_addrs[i].alias);

		if (alias.s.base == 0) {

		if (alias.s.enable && alias.s.base == 0) {

			*size = (1UL << alias.s.m_alias);

			redirect.v = uv_read_local_mmr(redir_addrs[i].redirect);

			*base = (unsigned long)redirect.s.dest_base << DEST_SHIFT;

			return;

		}

	}

	BUG();

	*base = *size = 0;

}



enum map_type {map_wb, map_uc};
@@ -619,12 +619,12 @@ void __init uv_system_init(void) 
		uv_cpu_hub_info(cpu)->lowmem_remap_base = lowmem_redir_base;

		uv_cpu_hub_info(cpu)->lowmem_remap_top = lowmem_redir_size;

		uv_cpu_hub_info(cpu)->m_val = m_val;

		uv_cpu_hub_info(cpu)->n_val = m_val;

		uv_cpu_hub_info(cpu)->n_val = n_val;

		uv_cpu_hub_info(cpu)->numa_blade_id = blade;

		uv_cpu_hub_info(cpu)->blade_processor_id = lcpu;

		uv_cpu_hub_info(cpu)->pnode = pnode;

		uv_cpu_hub_info(cpu)->pnode_mask = pnode_mask;

		uv_cpu_hub_info(cpu)->gpa_mask = (1 << (m_val + n_val)) - 1;

		uv_cpu_hub_info(cpu)->gpa_mask = (1UL << (m_val + n_val)) - 1;

		uv_cpu_hub_info(cpu)->gnode_upper = gnode_upper;

		uv_cpu_hub_info(cpu)->gnode_extra = gnode_extra;

		uv_cpu_hub_info(cpu)->global_mmr_base = mmr_base;

arch/x86/kernel/cpu/mcheck/mce.c

+2 −1
Original line number Diff line number Diff line
@@ -1214,6 +1214,7 @@ static int __cpuinit mce_cap_init(void) 
	rdmsrl(MSR_IA32_MCG_CAP, cap);



	b = cap & MCG_BANKCNT_MASK;

	if (!banks)

		printk(KERN_INFO "mce: CPU supports %d MCE banks\n", b);



	if (b > MAX_NR_BANKS) {