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Commit 77772d5f authored by Rajendra Nayak's avatar Rajendra Nayak Committed by paul
Browse files

ARM: OMAP4: PM: PRM/CM module offsets for OMAP4 



This patch adds the offsets for new modules in PRM
and CM for OMAP4
These are autogenerated using a python script (gen_prcm44xx_h.py)
developed by Paul Walmsley and Benoit Cousson.

Signed-off-by: default avatarRajendra Nayak <rnayak@ti.com>
Signed-off-by: default avatarPaul Walmsley <paul@pwsan.com>
Cc: Benoit Cousson <b-cousson@ti.com>
parent 9ef89150

arch/arm/mach-omap2/prcm-common.h

+65 −2
Original line number Diff line number Diff line
@@ -4,10 +4,12 @@ 
/*

 * OMAP2/3 PRCM base and module definitions

 *

 * Copyright (C) 2007-2008 Texas Instruments, Inc.

 * Copyright (C) 2007-2008 Nokia Corporation

 * Copyright (C) 2007-2009 Texas Instruments, Inc.

 * Copyright (C) 2007-2009 Nokia Corporation

 *

 * Written by Paul Walmsley

 * OMAP4 defines in this file are automatically generated from the OMAP hardware

 * databases.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 as
@@ -49,6 +51,67 @@ 
#define OMAP3430_NEON_MOD				0xb00

#define OMAP3430ES2_USBHOST_MOD				0xc00



/* OMAP44XX specific module offsets */



/* CM1 instances */



#define OMAP4430_CM1_OCP_SOCKET_MOD	0x0000

#define OMAP4430_CM1_CKGEN_MOD		0x0100

#define OMAP4430_CM1_MPU_MOD		0x0300

#define OMAP4430_CM1_TESLA_MOD		0x0400

#define OMAP4430_CM1_ABE_MOD		0x0500

#define OMAP4430_CM1_RESTORE_MOD	0x0e00

#define OMAP4430_CM1_INSTR_MOD		0x0f00



/* CM2 instances */



#define OMAP4430_CM2_OCP_SOCKET_MOD	0x0000

#define OMAP4430_CM2_CKGEN_MOD		0x0100

#define OMAP4430_CM2_ALWAYS_ON_MOD	0x0600

#define OMAP4430_CM2_CORE_MOD		0x0700

#define OMAP4430_CM2_IVAHD_MOD		0x0f00

#define OMAP4430_CM2_CAM_MOD		0x1000

#define OMAP4430_CM2_DSS_MOD		0x1100

#define OMAP4430_CM2_GFX_MOD		0x1200

#define OMAP4430_CM2_L3INIT_MOD		0x1300

#define OMAP4430_CM2_L4PER_MOD		0x1400

#define OMAP4430_CM2_CEFUSE_MOD		0x1600

#define OMAP4430_CM2_RESTORE_MOD	0x1e00

#define OMAP4430_CM2_INSTR_MOD		0x1f00



/* PRM instances */



#define OMAP4430_PRM_OCP_SOCKET_MOD	0x0000

#define OMAP4430_PRM_CKGEN_MOD		0x0100

#define OMAP4430_PRM_MPU_MOD		0x0300

#define OMAP4430_PRM_TESLA_MOD		0x0400

#define OMAP4430_PRM_ABE_MOD		0x0500

#define OMAP4430_PRM_ALWAYS_ON_MOD	0x0600

#define OMAP4430_PRM_CORE_MOD		0x0700

#define OMAP4430_PRM_IVAHD_MOD		0x0f00

#define OMAP4430_PRM_CAM_MOD		0x1000

#define OMAP4430_PRM_DSS_MOD		0x1100

#define OMAP4430_PRM_GFX_MOD		0x1200

#define OMAP4430_PRM_L3INIT_MOD		0x1300

#define OMAP4430_PRM_L4PER_MOD		0x1400

#define OMAP4430_PRM_CEFUSE_MOD		0x1600

#define OMAP4430_PRM_WKUP_MOD		0x1700

#define OMAP4430_PRM_WKUP_CM_MOD	0x1800

#define OMAP4430_PRM_EMU_MOD		0x1900

#define OMAP4430_PRM_EMU_CM_MOD		0x1a00

#define OMAP4430_PRM_DEVICE_MOD		0x1b00

#define OMAP4430_PRM_INSTR_MOD		0x1f00



/* SCRM instances */



#define OMAP4430_SCRM_SCRM_MOD	0x0000



/* CHIRONSS instances */



#define OMAP4430_CHIRONSS_CHIRONSS_OCP_SOCKET_PRCM_MOD	0x0000

#define OMAP4430_CHIRONSS_CHIRONSS_DEVICE_PRM_MOD	0x0200

#define OMAP4430_CHIRONSS_CHIRONSS_CPU0_MOD		0x0400

#define OMAP4430_CHIRONSS_CHIRONSS_CPU1_MOD		0x0800



/* 24XX register bits shared between CM & PRM registers */