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Commit 76e7745e authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'zynq-dt-fixes-for-3.15' of git://git.xilinx.com/linux-xlnx into fixes 

arm: Xilinx Zynq DT fixes for v3.15

- Enable Zynq I2c
- Fix cpufreq DT binding

* tag 'zynq-dt-fixes-for-3.15' of git://git.xilinx.com/linux-xlnx

:
  ARM: zynq: dt: Add I2C nodes to Zynq device tree
  ARM: zynq: DT: Add 'clock-latency' property

Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents 1fc52762 0f6faa3f

arch/arm/boot/dts/zynq-7000.dtsi

+23 −0
Original line number Diff line number Diff line
@@ -24,6 +24,7 @@ 
			device_type = "cpu";

			reg = <0>;

			clocks = <&clkc 3>;

			clock-latency = <1000>;

			operating-points = <

				/* kHz    uV */

				666667  1000000
@@ -54,6 +55,28 @@ 
		interrupt-parent = <&intc>;

		ranges;



		i2c0: zynq-i2c@e0004000 {

			compatible = "cdns,i2c-r1p10";

			status = "disabled";

			clocks = <&clkc 38>;

			interrupt-parent = <&intc>;

			interrupts = <0 25 4>;

			reg = <0xe0004000 0x1000>;

			#address-cells = <1>;

			#size-cells = <0>;

		};



		i2c1: zynq-i2c@e0005000 {

			compatible = "cdns,i2c-r1p10";

			status = "disabled";

			clocks = <&clkc 39>;

			interrupt-parent = <&intc>;

			interrupts = <0 48 4>;

			reg = <0xe0005000 0x1000>;

			#address-cells = <1>;

			#size-cells = <0>;

		};



		intc: interrupt-controller@f8f01000 {

			compatible = "arm,cortex-a9-gic";

			#interrupt-cells = <3>;

arch/arm/boot/dts/zynq-zc702.dts

+76 −0
Original line number Diff line number Diff line
@@ -34,6 +34,82 @@ 
	phy-mode = "rgmii";

};



&i2c0 {

	status = "okay";

	clock-frequency = <400000>;



	i2cswitch@74 {

		compatible = "nxp,pca9548";

		#address-cells = <1>;

		#size-cells = <0>;

		reg = <0x74>;



		i2c@0 {

			#address-cells = <1>;

			#size-cells = <0>;

			reg = <0>;

			si570: clock-generator@5d {

				#clock-cells = <0>;

				compatible = "silabs,si570";

				temperature-stability = <50>;

				reg = <0x5d>;

				factory-fout = <156250000>;

				clock-frequency = <148500000>;

			};

		};



		i2c@2 {

			#address-cells = <1>;

			#size-cells = <0>;

			reg = <2>;

			eeprom@54 {

				compatible = "at,24c08";

				reg = <0x54>;

			};

		};



		i2c@3 {

			#address-cells = <1>;

			#size-cells = <0>;

			reg = <3>;

			gpio@21 {

				compatible = "ti,tca6416";

				reg = <0x21>;

				gpio-controller;

				#gpio-cells = <2>;

			};

		};



		i2c@4 {

			#address-cells = <1>;

			#size-cells = <0>;

			reg = <4>;

			rtc@51 {

				compatible = "nxp,pcf8563";

				reg = <0x51>;

			};

		};



		i2c@7 {

			#address-cells = <1>;

			#size-cells = <0>;

			reg = <7>;

			hwmon@52 {

				compatible = "ti,ucd9248";

				reg = <52>;

			};

			hwmon@53 {

				compatible = "ti,ucd9248";

				reg = <53>;

			};

			hwmon@54 {

				compatible = "ti,ucd9248";

				reg = <54>;

			};

		};

	};

};



&sdhci0 {

	status = "okay";

};

arch/arm/boot/dts/zynq-zc706.dts

+68 −0
Original line number Diff line number Diff line
@@ -35,6 +35,74 @@ 
	phy-mode = "rgmii";

};



&i2c0 {

	status = "okay";

	clock-frequency = <400000>;



	i2cswitch@74 {

		compatible = "nxp,pca9548";

		#address-cells = <1>;

		#size-cells = <0>;

		reg = <0x74>;



		i2c@0 {

			#address-cells = <1>;

			#size-cells = <0>;

			reg = <0>;

			si570: clock-generator@5d {

				#clock-cells = <0>;

				compatible = "silabs,si570";

				temperature-stability = <50>;

				reg = <0x5d>;

				factory-fout = <156250000>;

				clock-frequency = <148500000>;

			};

		};



		i2c@2 {

			#address-cells = <1>;

			#size-cells = <0>;

			reg = <2>;

			eeprom@54 {

				compatible = "at,24c08";

				reg = <0x54>;

			};

		};



		i2c@3 {

			#address-cells = <1>;

			#size-cells = <0>;

			reg = <3>;

			gpio@21 {

				compatible = "ti,tca6416";

				reg = <0x21>;

				gpio-controller;

				#gpio-cells = <2>;

			};

		};



		i2c@4 {

			#address-cells = <1>;

			#size-cells = <0>;

			reg = <4>;

			rtc@51 {

				compatible = "nxp,pcf8563";

				reg = <0x51>;

			};

		};



		i2c@7 {

			#address-cells = <1>;

			#size-cells = <0>;

			reg = <7>;

			ucd90120@65 {

				compatible = "ti,ucd90120";

				reg = <0x65>;

			};

		};

	};

};



&sdhci0 {

	status = "okay";

};