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Commit 75eaff01 authored by Linus Torvalds's avatar Linus Torvalds
Browse files
Pull MIPS fixes from Ralf Baechle:
 - BMIPS SMP fixes
 - a build fix necessary for older compilers
 - two more bugs found my Chandras' testing
 - and one more build fix

* 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus:
  MIPS: BMIPS: fix slave CPU booting when physical CPU is not 0
  MIPS: BMIPS: do not change interrupt routing depending on boot CPU
  MIPS: powertv: Fix arguments for free_reserved_area()
  MIPS: Set default CPU type for BCM47XX platforms
  MIPS: uapi/asm/siginfo.h: Fix GCC 4.1.2 compilation
  MIPS: Fix multiple definitions of UNCAC_BASE.
parents f66d95d6 ff5fadaf
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+1 −0
Original line number Diff line number Diff line
@@ -114,6 +114,7 @@ config BCM47XX
	select FW_CFE
	select HW_HAS_PCI
	select IRQ_CPU
	select SYS_HAS_CPU_MIPS32_R1
	select NO_EXCEPT_FILL
	select SYS_SUPPORTS_32BIT_KERNEL
	select SYS_SUPPORTS_LITTLE_ENDIAN
+0 −1
Original line number Diff line number Diff line
@@ -2,7 +2,6 @@ if BCM47XX

config BCM47XX_SSB
	bool "SSB Support for Broadcom BCM47XX"
	select SYS_HAS_CPU_MIPS32_R1
	select SSB
	select SSB_DRIVER_MIPS
	select SSB_DRIVER_EXTIF
+4 −0
Original line number Diff line number Diff line
@@ -25,8 +25,12 @@
#else
#define CAC_BASE		_AC(0x80000000, UL)
#endif
#ifndef IO_BASE
#define IO_BASE			_AC(0xa0000000, UL)
#endif
#ifndef UNCAC_BASE
#define UNCAC_BASE		_AC(0xa0000000, UL)
#endif

#ifndef MAP_BASE
#ifdef CONFIG_KVM_GUEST
+4 −3
Original line number Diff line number Diff line
@@ -25,11 +25,12 @@ struct siginfo;
/*
 * Careful to keep union _sifields from shifting ...
 */
#if __SIZEOF_LONG__ == 4
#if _MIPS_SZLONG == 32
#define __ARCH_SI_PREAMBLE_SIZE (3 * sizeof(int))
#endif
#if __SIZEOF_LONG__ == 8
#elif _MIPS_SZLONG == 64
#define __ARCH_SI_PREAMBLE_SIZE (4 * sizeof(int))
#else
#error _MIPS_SZLONG neither 32 nor 64
#endif

#include <asm-generic/siginfo.h>
+5 −1
Original line number Diff line number Diff line
@@ -54,7 +54,11 @@ LEAF(bmips_smp_movevec)
	/* set up CPU1 CBR; move BASE to 0xa000_0000 */
	li	k0, 0xff400000
	mtc0	k0, $22, 6
	li	k1, CKSEG1 | BMIPS_RELO_VECTOR_CONTROL_1
	/* set up relocation vector address based on thread ID */
	mfc0	k1, $22, 3
	srl	k1, 16
	andi	k1, 0x8000
	or	k1, CKSEG1 | BMIPS_RELO_VECTOR_CONTROL_0
	or	k0, k1
	li	k1, 0xa0080000
	sw	k1, 0(k0)
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