Commit 75aed5f2 authored Dec 11, 2017 by Ingrid Gallardo

drm/msm/sde: fix mdp clk under vote in dp



Current driver checks the current cached state
of the mdp clock to decide if the mdp clock
needs to be updated. However, the clock value
is never reset to zero, this is a problem when
after a DP connect/disconnect, the cached clock
value is same as the new clock, since this prevents
the driver from voting.
Fix this problem by making sure the mdp clock and
bandwidth values are reset when the crtc is
disabled.

Change-Id: Ibe3744fcf69b2020e1cefd74b6325170d12d1e47
Signed-off-by: Ingrid Gallardo <ingridg@codeaurora.org>

parent 4e7334e5

drivers/gpu/drm/msm/sde/sde_core_perf.c

+0 −5

Original line number	Diff line number	Diff line
		@@ -520,11 +520,6 @@ void sde_core_perf_crtc_update(struct drm_crtc *crtc,
		return;
		}
		priv = kms->dev->dev_private;

		/* wake vote update is not required with display rsc */
		if (kms->perf.bw_vote_mode == DISP_RSC_MODE && stop_req)
		return;

		sde_crtc = to_sde_crtc(crtc);
		sde_cstate = to_sde_crtc_state(crtc->state);