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Commit 7587eb18 authored by Otto Kekäläinen's avatar Otto Kekäläinen Committed by Rob Herring
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Fix spelling errors in Documentation/devicetree



Signed-off-by: default avatarOtto Kekäläinen <otto@seravo.fi>
Signed-off-by: default avatarRob Herring <robh@kernel.org>
parent 0a6f366a
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+2 −2
Original line number Diff line number Diff line
@@ -86,10 +86,10 @@ Optional properties:
  firmware)
- arm,dynamic-clock-gating : L2 dynamic clock gating. Value: <0> (forcibly
  disable), <1> (forcibly enable), property absent (OS specific behavior,
  preferrably retain firmware settings)
  preferably retain firmware settings)
- arm,standby-mode: L2 standby mode enable. Value <0> (forcibly disable),
  <1> (forcibly enable), property absent (OS specific behavior,
  preferrably retain firmware settings)
  preferably retain firmware settings)

Example:

+1 −1
Original line number Diff line number Diff line
@@ -43,7 +43,7 @@ Each port children node must have the following mandatory properties:
Note that a port labelled "dsa" will imply checking for the uplink phandle
described below.

Optionnal property:
Optional property:
- link			: Should be a list of phandles to another switch's DSA port.
			  This property is only used when switches are being
			  chained/cascaded together. This port is used as outgoing port
+2 −2
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@@ -35,7 +35,7 @@ PROPERTIES
		Definition: Specifies the index of the FMan unit.

		The cell-index value may be used by the SoC, to identify the
		FMan unit in the SoC memory map. In the table bellow,
		FMan unit in the SoC memory map. In the table below,
		there's a description of the cell-index use in each SoC:

		- P1023:
@@ -247,7 +247,7 @@ PROPERTIES

		The cell-index value may be used by the FMan or the SoC, to
		identify the MAC unit in the FMan (or SoC) memory map.
		In the tables bellow there's a description of the cell-index
		In the tables below there's a description of the cell-index
		use, there are two tables, one describes the use of cell-index
		by the FMan, the second describes the use by the SoC:

+1 −1
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@@ -14,7 +14,7 @@ architectures that typically run big-endian operating systems
be marked that way in the devicetree.

On SoCs that can be operated in both big-endian and little-endian
modes, with a single hardware switch controlling both the endianess
modes, with a single hardware switch controlling both the endianness
of the CPU and a byteswap for MMIO registers (e.g. many Broadcom MIPS
chips), "native-endian" is used to allow using the same device tree
blob in both cases.
+2 −2
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@@ -28,10 +28,10 @@ Optional properties:
- dma-names: Should contain "tx" for transmit and "rx" for receive channels
- qcom,tx-crci: Identificator <u32> for Client Rate Control Interface to be
           used with TX DMA channel. Required when using DMA for transmission
           with UARTDM v1.3 and bellow.
           with UARTDM v1.3 and below.
- qcom,rx-crci: Identificator <u32> for Client Rate Control Interface to be
           used with RX DMA channel. Required when using DMA for reception
           with UARTDM v1.3 and bellow.
           with UARTDM v1.3 and below.

Note: Aliases may be defined to ensure the correct ordering of the UARTs.
The alias serialN will result in the UART being assigned port N.  If any
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