Loading drivers/gpu/msm/a6xx_reg.h +1 −0 Original line number Diff line number Diff line Loading @@ -687,6 +687,7 @@ #define A6XX_GMU_RPMH_CTRL 0x1F8E8 #define A6XX_GMU_RPMH_HYST_CTRL 0x1F8E9 #define A6XX_GMU_RPMH_POWER_STATE 0x1F8EC #define A6XX_GMU_BOOT_KMD_LM_HANDSHAKE 0x1F9F0 /* HFI registers*/ #define A6XX_GMU_ALWAYS_ON_COUNTER_L 0x1F888 Loading drivers/gpu/msm/adreno_a6xx.c +4 −0 Original line number Diff line number Diff line Loading @@ -673,6 +673,10 @@ static void a6xx_gmu_power_config(struct kgsl_device *device) break; } /* ACD feature enablement */ if (ADRENO_FEATURE(adreno_dev, ADRENO_LM)) _gmu_regrmw(device, A6XX_GMU_BOOT_KMD_LM_HANDSHAKE, BIT(10)); /* Enable RPMh GPU client */ if (ADRENO_FEATURE(adreno_dev, ADRENO_RPMH)) _gmu_regrmw(device, A6XX_GMU_RPMH_CTRL, RPMH_ENABLE_MASK); Loading Loading
drivers/gpu/msm/a6xx_reg.h +1 −0 Original line number Diff line number Diff line Loading @@ -687,6 +687,7 @@ #define A6XX_GMU_RPMH_CTRL 0x1F8E8 #define A6XX_GMU_RPMH_HYST_CTRL 0x1F8E9 #define A6XX_GMU_RPMH_POWER_STATE 0x1F8EC #define A6XX_GMU_BOOT_KMD_LM_HANDSHAKE 0x1F9F0 /* HFI registers*/ #define A6XX_GMU_ALWAYS_ON_COUNTER_L 0x1F888 Loading
drivers/gpu/msm/adreno_a6xx.c +4 −0 Original line number Diff line number Diff line Loading @@ -673,6 +673,10 @@ static void a6xx_gmu_power_config(struct kgsl_device *device) break; } /* ACD feature enablement */ if (ADRENO_FEATURE(adreno_dev, ADRENO_LM)) _gmu_regrmw(device, A6XX_GMU_BOOT_KMD_LM_HANDSHAKE, BIT(10)); /* Enable RPMh GPU client */ if (ADRENO_FEATURE(adreno_dev, ADRENO_RPMH)) _gmu_regrmw(device, A6XX_GMU_RPMH_CTRL, RPMH_ENABLE_MASK); Loading