Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 751ca305 authored by Johannes Berg's avatar Johannes Berg Committed by Wey-Yi Guy
Browse files

iwlwifi: define PAN queues/FIFOs



PAN capable microcode has a different
queue assignment (not just more queues
for PAN) due to the way multicast is
handled for AP mode.

Signed-off-by: default avatarJohannes Berg <johannes.berg@intel.com>
Signed-off-by: default avatarWey-Yi Guy <wey-yi.w.guy@intel.com>
parent 13bb9483
Loading
Loading
Loading
Loading
+5 −5
Original line number Original line Diff line number Diff line
@@ -57,11 +57,11 @@ static const s8 iwlagn_ipan_queue_to_tx_fifo[] = {
	IWL_TX_FIFO_VI,
	IWL_TX_FIFO_VI,
	IWL_TX_FIFO_BE,
	IWL_TX_FIFO_BE,
	IWL_TX_FIFO_BK,
	IWL_TX_FIFO_BK,
	IWL_TX_FIFO_UNUSED, /* FIXME */
	IWL_TX_FIFO_BK_IPAN,
	IWL_TX_FIFO_UNUSED, /* FIXME */
	IWL_TX_FIFO_BE_IPAN,
	IWL_TX_FIFO_UNUSED, /* FIXME */
	IWL_TX_FIFO_VI_IPAN,
	IWL_TX_FIFO_UNUSED, /* FIXME */
	IWL_TX_FIFO_VO_IPAN,
	IWL_TX_FIFO_UNUSED, /* FIXME */
	IWL_TX_FIFO_BE_IPAN,
	IWLAGN_CMD_FIFO_NUM,
	IWLAGN_CMD_FIFO_NUM,
};
};


+4 −1
Original line number Original line Diff line number Diff line
@@ -3012,6 +3012,9 @@ static int __iwl_up(struct iwl_priv *priv)
	iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
	iwl_write32(priv, CSR_INT, 0xFFFFFFFF);


	/* must be initialised before iwl_hw_nic_init */
	/* must be initialised before iwl_hw_nic_init */
	if (priv->valid_contexts != BIT(IWL_RXON_CTX_BSS))
		priv->cmd_queue = IWL_IPAN_CMD_QUEUE_NUM;
	else
		priv->cmd_queue = IWL_DEFAULT_CMD_QUEUE_NUM;
		priv->cmd_queue = IWL_DEFAULT_CMD_QUEUE_NUM;


	ret = iwlagn_hw_nic_init(priv);
	ret = iwlagn_hw_nic_init(priv);
+13 −2
Original line number Original line Diff line number Diff line
@@ -253,10 +253,14 @@ struct iwl_channel_info {
	struct iwl3945_scan_power_info scan_pwr_info[IWL_NUM_SCAN_RATES];
	struct iwl3945_scan_power_info scan_pwr_info[IWL_NUM_SCAN_RATES];
};
};


#define IWL_TX_FIFO_BK		0
#define IWL_TX_FIFO_BK		0	/* shared */
#define IWL_TX_FIFO_BE		1
#define IWL_TX_FIFO_BE		1
#define IWL_TX_FIFO_VI		2
#define IWL_TX_FIFO_VI		2	/* shared */
#define IWL_TX_FIFO_VO		3
#define IWL_TX_FIFO_VO		3
#define IWL_TX_FIFO_BK_IPAN	IWL_TX_FIFO_BK
#define IWL_TX_FIFO_BE_IPAN	4
#define IWL_TX_FIFO_VI_IPAN	IWL_TX_FIFO_VI
#define IWL_TX_FIFO_VO_IPAN	5
#define IWL_TX_FIFO_UNUSED	-1
#define IWL_TX_FIFO_UNUSED	-1


/* Minimum number of queues. MAX_NUM is defined in hw specific files.
/* Minimum number of queues. MAX_NUM is defined in hw specific files.
@@ -270,6 +274,13 @@ struct iwl_channel_info {
#define IWL_DEFAULT_CMD_QUEUE_NUM	4
#define IWL_DEFAULT_CMD_QUEUE_NUM	4
#define IWL_IPAN_CMD_QUEUE_NUM		9
#define IWL_IPAN_CMD_QUEUE_NUM		9


/*
 * This queue number is required for proper operation
 * because the ucode will stop/start the scheduler as
 * required.
 */
#define IWL_IPAN_MCAST_QUEUE		8

/* Power management (not Tx power) structures */
/* Power management (not Tx power) structures */


enum iwl_pwr_src {
enum iwl_pwr_src {