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Commit 74779e22 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'for-3.8-rc1' of git://gitorious.org/linux-pwm/linux-pwm

Pull pwm changes from Thierry Reding:
 "A new driver has been added for the SPEAr platform and the
  TWL4030/6030 driver has been replaced by two drivers that control the
  regular PWMs and the PWM driven LEDs provided by the chips.

  The vt8500, tiecap, tiehrpwm, i.MX, LPC32xx and Samsung drivers have
  all been improved and the device tree bindings now support the PWM
  signal polarity."

Fix up trivial conflicts due to __devinit/exit removal.

* tag 'for-3.8-rc1' of git://gitorious.org/linux-pwm/linux-pwm: (21 commits)
  pwm: samsung: add missing s3c->pwm_id assignment
  pwm: lpc32xx: Set the chip base for dynamic allocation
  pwm: lpc32xx: Properly disable the clock on device removal
  pwm: lpc32xx: Fix the PWM polarity
  pwm: i.MX: eliminate build warning
  pwm: Export of_pwm_xlate_with_flags()
  pwm: Remove pwm-twl6030 driver
  pwm: New driver to support PWM driven LEDs on TWL4030/6030 series of PMICs
  pwm: New driver to support PWMs on TWL4030/6030 series of PMICs
  pwm: pwm-tiehrpwm: pinctrl support
  pwm: tiehrpwm: Add device-tree binding
  pwm: pwm-tiehrpwm: Adding TBCLK gating support.
  pwm: pwm-tiecap: pinctrl support
  pwm: tiecap: Add device-tree binding
  pwm: Add TI PWM subsystem driver
  pwm: Device tree support for PWM polarity
  pwm: vt8500: Ensure PWM clock is enabled during pwm_config
  pwm: vt8500: Fix build error
  pwm: spear: Staticize spear_pwm_config()
  pwm: Add SPEAr PWM chip driver support
  ...
parents 5031a2a7 20e8ac3e
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TI SOC ECAP based APWM controller

Required properties:
- compatible: Must be "ti,am33xx-ecap"
- #pwm-cells: Should be 3. Number of cells being used to specify PWM property.
  First cell specifies the per-chip index of the PWM to use, the second
  cell is the period in nanoseconds and bit 0 in the third cell is used to
  encode the polarity of PWM output. Set bit 0 of the third in PWM specifier
  to 1 for inverse polarity & set to 0 for normal polarity.
- reg: physical base address and size of the registers map.

Optional properties:
- ti,hwmods: Name of the hwmod associated to the ECAP:
  "ecap<x>", <x> being the 0-based instance number from the HW spec

Example:

ecap0: ecap@0 {
	compatible = "ti,am33xx-ecap";
	#pwm-cells = <3>;
	reg = <0x48300100 0x80>;
	ti,hwmods = "ecap0";
};
+23 −0
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TI SOC EHRPWM based PWM controller

Required properties:
- compatible : Must be "ti,am33xx-ehrpwm"
- #pwm-cells: Should be 3. Number of cells being used to specify PWM property.
  First cell specifies the per-chip index of the PWM to use, the second
  cell is the period in nanoseconds and bit 0 in the third cell is used to
  encode the polarity of PWM output. Set bit 0 of the third in PWM specifier
  to 1 for inverse polarity & set to 0 for normal polarity.
- reg: physical base address and size of the registers map.

Optional properties:
- ti,hwmods: Name of the hwmod associated to the EHRPWM:
  "ehrpwm<x>", <x> being the 0-based instance number from the HW spec

Example:

ehrpwm0: ehrpwm@0 {
	compatible = "ti,am33xx-ehrpwm";
	#pwm-cells = <3>;
	reg = <0x48300200 0x100>;
	ti,hwmods = "ehrpwm0";
};
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TI SOC based PWM Subsystem

Required properties:
- compatible: Must be "ti,am33xx-pwmss";
- reg: physical base address and size of the registers map.
- address-cells: Specify the number of u32 entries needed in child nodes.
		  Should set to 1.
- size-cells: specify number of u32 entries needed to specify child nodes size
		in reg property. Should set to 1.
- ranges: describes the address mapping of a memory-mapped bus. Should set to
	   physical address map of child's base address, physical address within
	   parent's address  space and length of the address map. For am33xx,
	   3 set of child register maps present, ECAP register space, EQEP
	   register space, EHRPWM register space.

Also child nodes should also populated under PWMSS DT node.

Example:
pwmss0: pwmss@48300000 {
	compatible = "ti,am33xx-pwmss";
	reg = <0x48300000 0x10>;
	ti,hwmods = "epwmss0";
	#address-cells = <1>;
	#size-cells = <1>;
	status = "disabled";
	ranges = <0x48300100 0x48300100 0x80   /* ECAP */
		  0x48300180 0x48300180 0x80   /* EQEP */
		  0x48300200 0x48300200 0x80>; /* EHRPWM */

	/* child nodes go here */
};
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@@ -37,10 +37,21 @@ device:
		pwm-names = "backlight";
	};

Note that in the example above, specifying the "pwm-names" is redundant
because the name "backlight" would be used as fallback anyway.

pwm-specifier typically encodes the chip-relative PWM number and the PWM
period in nanoseconds. Note that in the example above, specifying the
"pwm-names" is redundant because the name "backlight" would be used as
fallback anyway.
period in nanoseconds.

Optionally, the pwm-specifier can encode a number of flags in a third cell:
- bit 0: PWM signal polarity (0: normal polarity, 1: inverse polarity)

Example with optional PWM specifier for inverse polarity

	bl: backlight {
		pwms = <&pwm 0 5000000 1>;
		pwm-names = "backlight";
	};

2) PWM controller nodes
-----------------------
+18 −0
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== ST SPEAr SoC PWM controller ==

Required properties:
- compatible: should be one of:
  - "st,spear320-pwm"
  - "st,spear1340-pwm"
- reg: physical base address and length of the controller's registers
- #pwm-cells: number of cells used to specify PWM which is fixed to 2 on
  SPEAr. The first cell specifies the per-chip index of the PWM to use and
  the second cell is the period in nanoseconds.

Example:

        pwm: pwm@a8000000 {
            compatible ="st,spear320-pwm";
            reg = <0xa8000000 0x1000>;
            #pwm-cells = <2>;
        };
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