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Commit 7416d728 authored by Tony Truong's avatar Tony Truong Committed by Gerrit - the friendly Code Review server
Browse files

msm: pcie: provide userspace control to PCIe boot configuration 



Users can invert the default settings for L0s, L1, L1ss,
or AER for each root complex before boot. Users can
also requests for each root complex to keep its
resources on when link training fails.

Change-Id: Id2e7617f23434e6d38f7adc89f4910c928d27edc
Signed-off-by: default avatarTony Truong <truong@codeaurora.org>
parent cc8c86a2

drivers/pci/host/pci-msm.c

+47 −4
Original line number Diff line number Diff line
@@ -554,6 +554,32 @@ static int msm_pcie_debug_mask; 
module_param_named(debug_mask, msm_pcie_debug_mask,

			    int, 0644);



/*

 * For each bit set, invert the default capability

 * option for the corresponding root complex

 * and its devices.

 */

static int msm_pcie_invert_l0s_support;

module_param_named(invert_l0s_support, msm_pcie_invert_l0s_support,

			    int, 0644);

static int msm_pcie_invert_l1_support;

module_param_named(invert_l1_support, msm_pcie_invert_l1_support,

			    int, 0644);

static int msm_pcie_invert_l1ss_support;

module_param_named(invert_l1ss_support, msm_pcie_invert_l1ss_support,

			    int, 0644);

static int msm_pcie_invert_aer_support;

module_param_named(invert_aer_support, msm_pcie_invert_aer_support,

			    int, 0644);



/*

 * For each bit set, keep the resources on when link training fails

 * or linkdown occurs for the corresponding root complex

 */

static int msm_pcie_keep_resources_on;

module_param_named(keep_resources_on, msm_pcie_keep_resources_on,

			    int, 0644);



/* debugfs values */

static u32 rc_sel;

static u32 base_sel;
@@ -3853,6 +3879,9 @@ static int msm_pcie_enable(struct msm_pcie_dev_t *dev, u32 options) 
	goto out;



link_fail:

	if (msm_pcie_keep_resources_on & BIT(dev->rc_idx))

		goto out;



	if (dev->gpio[MSM_PCIE_GPIO_EP].num)

		gpio_set_value(dev->gpio[MSM_PCIE_GPIO_EP].num,

				1 - dev->gpio[MSM_PCIE_GPIO_EP].on);
@@ -4046,6 +4075,7 @@ static int msm_pcie_config_device_table(struct device *dev, void *pdev) 
					if (pcie_dev->num_ep > 1)

						pcie_dev->pending_ep_reg = true;



					if (pcie_dev->aer_enable)

						msm_pcie_config_ep_aer(pcie_dev,

							&dev_table_t[index]);
@@ -4561,8 +4591,10 @@ static irqreturn_t handle_linkdown_irq(int irq, void *data) 
			panic("User has chosen to panic on linkdown\n");



		/* assert PERST */

		if (!(msm_pcie_keep_resources_on & BIT(dev->rc_idx)))

			gpio_set_value(dev->gpio[MSM_PCIE_GPIO_PERST].num,

					dev->gpio[MSM_PCIE_GPIO_PERST].on);



		PCIE_ERR(dev, "PCIe link is down for RC%d\n", dev->rc_idx);



		if (dev->num_ep > 1) {
@@ -5265,16 +5297,25 @@ static int msm_pcie_probe(struct platform_device *pdev) 
	msm_pcie_dev[rc_idx].l0s_supported =

		of_property_read_bool((&pdev->dev)->of_node,

				"qcom,l0s-supported");

	if (msm_pcie_invert_l0s_support & BIT(rc_idx))

		msm_pcie_dev[rc_idx].l0s_supported =

			!msm_pcie_dev[rc_idx].l0s_supported;

	PCIE_DBG(&msm_pcie_dev[rc_idx], "L0s is %s supported.\n",

		msm_pcie_dev[rc_idx].l0s_supported ? "" : "not");

	msm_pcie_dev[rc_idx].l1_supported =

		of_property_read_bool((&pdev->dev)->of_node,

				"qcom,l1-supported");

	if (msm_pcie_invert_l1_support & BIT(rc_idx))

		msm_pcie_dev[rc_idx].l1_supported =

			!msm_pcie_dev[rc_idx].l1_supported;

	PCIE_DBG(&msm_pcie_dev[rc_idx], "L1 is %s supported.\n",

		msm_pcie_dev[rc_idx].l1_supported ? "" : "not");

	msm_pcie_dev[rc_idx].l1ss_supported =

		of_property_read_bool((&pdev->dev)->of_node,

				"qcom,l1ss-supported");

	if (msm_pcie_invert_l1ss_support & BIT(rc_idx))

		msm_pcie_dev[rc_idx].l1ss_supported =

			!msm_pcie_dev[rc_idx].l1ss_supported;

	PCIE_DBG(&msm_pcie_dev[rc_idx], "L1ss is %s supported.\n",

		msm_pcie_dev[rc_idx].l1ss_supported ? "" : "not");

	msm_pcie_dev[rc_idx].common_clk_en =
@@ -5528,6 +5569,8 @@ static int msm_pcie_probe(struct platform_device *pdev) 
	msm_pcie_dev[rc_idx].suspending = false;

	msm_pcie_dev[rc_idx].wake_counter = 0;

	msm_pcie_dev[rc_idx].aer_enable = true;

	if (msm_pcie_invert_aer_support)

		msm_pcie_dev[rc_idx].aer_enable = false;

	msm_pcie_dev[rc_idx].power_on = false;

	msm_pcie_dev[rc_idx].use_msi = false;

	msm_pcie_dev[rc_idx].use_pinctrl = false;