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Commit 73dfcdd8 authored by Satyajit Desai's avatar Satyajit Desai
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coresight-tmc-etr: update higher order bits of trace buffer 



ETR locates the trace location in system memory by using two
different register to obtain the full 40-bit address range.
This patch add capability for us to program the higher
8-bits.

Change-Id: I70128a3ad59157cc7728d024c19d8ebf3791e26a
Signed-off-by: default avatarSatyajit Desai <sadesai@codeaurora.org>
parent e4e90297

drivers/hwtracing/coresight/coresight-tmc-etr.c

+3 −1
Original line number Diff line number Diff line
@@ -447,7 +447,9 @@ void tmc_etr_enable_hw(struct tmc_drvdata *drvdata) 
	writel_relaxed(axictl, drvdata->base + TMC_AXICTL);



	writel_relaxed(drvdata->paddr, drvdata->base + TMC_DBALO);

	writel_relaxed(0x0, drvdata->base + TMC_DBAHI);

	writel_relaxed(((u64)drvdata->paddr >> 32) & 0xFF,

		       drvdata->base + TMC_DBAHI);



	writel_relaxed(TMC_FFCR_EN_FMT | TMC_FFCR_EN_TI |

		       TMC_FFCR_FON_FLIN | TMC_FFCR_FON_TRIG_EVT |

		       TMC_FFCR_TRIGON_TRIGIN,