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Commit 72a4bb05 authored by Chris Lew's avatar Chris Lew Committed by Gerrit - the friendly Code Review server
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ARM: dts: msm: Update QMP interrupt mask for sdxpoorwills 



AOP is expecting to receive interrupts on index 1 instead of index 0.
Update the interrupt trigger mask.

Change-Id: I7c6dc46aa919601cd4e19a756a6a7403964b9c28
Signed-off-by: default avatarChris Lew <clew@codeaurora.org>
parent 2fed71ce

arch/arm/boot/dts/qcom/sdxpoorwills.dtsi

+1 −1
Original line number Diff line number Diff line
@@ -518,7 +518,7 @@ 
		reg = <0xc300000 0x400>,

			<0x17811008 0x4>;

		reg-names = "msgram", "irq-reg-base";

		qcom,irq-mask = <0x1>;

		qcom,irq-mask = <0x2>;

		interrupts = <GIC_SPI 221 IRQ_TYPE_EDGE_RISING>;

		priority = <0>;

		mbox-desc-offset = <0x0>;