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Commit 721e54e4 authored by Linux Build Service Account's avatar Linux Build Service Account Committed by Gerrit - the friendly Code Review server
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Merge "ARM: dts: msm: Enable display on sdxpoorwills CDP"

parents 503fc596 700a67d6
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+21 −0
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/* Copyright (c) 2018, The Linux Foundation. All rights reserved.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 and
 * only version 2 as published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 */

&soc {
	qcom,mdss_lcdc_ili_hvga {
		compatible = "qcom,mdss-qpic-panel";
		label = "ili9488 hvga lcdc panel";
		qcom,mdss-pan-res = <320 480>;
		qcom,mdss-pan-bpp = <18>;
		qcom,refresh_rate = <60>;
	};
};
+2 −0
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@@ -13,6 +13,8 @@
/dts-v1/;

#include "sdxpoorwills-cdp.dtsi"
#include "sdxpoorwills-display.dtsi"
#include "qpic-panel-ili-hvga.dtsi"

/ {
	model = "Qualcomm Technologies, Inc. SDXPOORWILLS CDP";
+37 −0
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/* Copyright (c) 2018, The Linux Foundation. All rights reserved.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 and
 * only version 2 as published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 */

/ {
	mdss_qpic: qcom,msm_qpic@7980000 {
		compatible = "qcom,mdss_qpic";
		reg = <0x1B00000 0x24000>;
		reg-names = "qpic_base";
		interrupts = <0 251 0>;

		qcom,msm-bus,name = "mdss_qpic";
		qcom,msm-bus,num-cases = <2>;
		qcom,msm-bus,num-paths = <1>;

		qcom,msm-bus,vectors-KBps =
			<91 512 0 0>,
			/* Voting for max b/w on PNOC bus for now */
			<91 512 400000 800000>;

		vdd-supply = <&pmxpoorwills_l6>;

		pinctrl-names= "mdss_default", "mdss_sleep";
		pinctrl-0 = <&mdss_cs_active &mdss_te_active
			&mdss_rs_active &mdss_ad_active &mdss_bl_active>;
		pinctrl-1 = <&mdss_cs_sleep &mdss_te_sleep
			&mdss_rs_sleep &mdss_ad_sleep &mdss_bl_sleep>;
	};
};
+132 −0
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@@ -1348,6 +1348,138 @@
			};
		};

		mdss_cs_active: mdss_cs_active {
			mux {
					pins = "gpio21";
					function = "ebi2_lcd";
			};

			config {
					pins = "gpio21";
					drive-strength = <10>; /* 10 mA */
					bias-disable; /* NO pull */
			};
		};

		mdss_cs_sleep: mdss_cs_sleep {
			mux {
					pins = "gpio21";
					function = "ebi2_lcd";
			};

			config {
					pins = "gpio21";
					drive-strength = <2>; /* 2 mA */
					bias-disable; /* NO pull */
			};
		};

		mdss_te_active: mdss_te_active {
			mux {
					pins = "gpio22";
					function = "ebi2_lcd";
			};

			config {
					pins = "gpio22";
					drive-strength = <10>; /* 10 mA */
					bias-disable; /* NO pull */
			};
		};

		mdss_te_sleep: mdss_te_sleep {
			mux {
					pins = "gpio22";
					function = "ebi2_lcd";
			};

			config {
					pins = "gpio22";
					drive-strength = <2>; /* 2 mA */
					bias-disable; /* NO pull */
			};
		};

		mdss_rs_active: mdss_rs_active {
			mux {
					pins = "gpio23";
					function = "ebi2_lcd";
			};

			config {
					pins = "gpio23";
					drive-strength = <10>; /* 10 mA */
					bias-disable; /* NO pull */
			};
		};

		mdss_rs_sleep: mdss_rs_sleep {
			mux {
					pins = "gpio23";
					function = "ebi2_lcd";
			};

			config {
					pins = "gpio23";
					drive-strength = <2>; /* 2 mA */
					bias-disable; /* NO pull */
			};
		};

		mdss_ad_active: mdss_ad_active {
			mux {
					pins = "gpio20";
					function = "ebi2_a";
			};

			config {
					pins = "gpio20";
					drive-strength = <10>; /* 10 mA */
					bias-disable; /* NO pull */
			};
		};

		mdss_ad_sleep: mdss_ad_sleep {
			mux {
					pins = "gpio20";
					function = "ebi2_a";
			};

			config {
					pins = "gpio20";
					drive-strength = <2>; /* 2 mA */
					bias-disable; /* NO pull */
			};
		};

		mdss_bl_active: mdss_bl_active {
			mux {
					pins = "gpio91";
					function = "gpio";
			};

			config {
					pins = "gpio91";
					drive-strength = <10>; /* 10 mA */
					bias-disable; /* NO pull */
					output-high;
			};
		};

		mdss_bl_sleep: mdss_bl_sleep {
			mux {
					pins = "gpio91";
					function = "gpio";
			};

			config {
					pins = "gpio91";
					drive-strength = <2>; /* 2 mA */
					bias-disable; /* NO pull */
					output-low;
			};
		};

		pmx_sec_mi2s_aux_din {
			sec_din_sleep: sec_din_sleep {
				mux {
+6 −0
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@@ -254,6 +254,9 @@ CONFIG_REGULATOR_QPNP=y
CONFIG_REGULATOR_RPMH=y
CONFIG_REGULATOR_STUB=y
CONFIG_FB=y
CONFIG_FB_MSM=y
CONFIG_FB_MSM_MDP_NONE=y
CONFIG_FB_MSM_QPIC_PANEL_DETECT=y
CONFIG_SOUND=y
CONFIG_SND=y
CONFIG_SND_DYNAMIC_MINORS=y
@@ -310,6 +313,9 @@ CONFIG_MMC_TEST=m
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_PLTFM=y
CONFIG_MMC_SDHCI_MSM=y
CONFIG_NEW_LEDS=y
CONFIG_LEDS_CLASS=y
CONFIG_LEDS_TRIGGERS=y
CONFIG_RTC_CLASS=y
CONFIG_RTC_DRV_QPNP=y
CONFIG_DMADEVICES=y
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