Loading arch/arm64/boot/dts/qcom/sdm845-qvr.dtsi +24 −0 Original line number Diff line number Diff line Loading @@ -60,6 +60,30 @@ qcom,sw-jeita-enable; }; &qupv3_se3_i2c { status = "ok"; nq@28 { compatible = "qcom,nq-nci"; reg = <0x28>; qcom,nq-irq = <&tlmm 63 0x00>; qcom,nq-ven = <&tlmm 12 0x00>; qcom,nq-firm = <&tlmm 62 0x00>; qcom,nq-clkreq = <&pm8998_gpios 21 0x00>; qcom,nq-esepwr = <&tlmm 116 0x00>; interrupt-parent = <&tlmm>; qcom,clk-src = "BBCLK3"; interrupts = <63 0>; interrupt-names = "nfc_irq"; pinctrl-names = "nfc_active", "nfc_suspend"; pinctrl-0 = <&nfc_int_active &nfc_enable_active &nfc_clk_default>; pinctrl-1 = <&nfc_int_suspend &nfc_enable_suspend>; clocks = <&clock_rpmh RPMH_LN_BB_CLK3>; clock-names = "ref_clk"; }; }; &qupv3_se10_i2c { status = "ok"; }; Loading Loading
arch/arm64/boot/dts/qcom/sdm845-qvr.dtsi +24 −0 Original line number Diff line number Diff line Loading @@ -60,6 +60,30 @@ qcom,sw-jeita-enable; }; &qupv3_se3_i2c { status = "ok"; nq@28 { compatible = "qcom,nq-nci"; reg = <0x28>; qcom,nq-irq = <&tlmm 63 0x00>; qcom,nq-ven = <&tlmm 12 0x00>; qcom,nq-firm = <&tlmm 62 0x00>; qcom,nq-clkreq = <&pm8998_gpios 21 0x00>; qcom,nq-esepwr = <&tlmm 116 0x00>; interrupt-parent = <&tlmm>; qcom,clk-src = "BBCLK3"; interrupts = <63 0>; interrupt-names = "nfc_irq"; pinctrl-names = "nfc_active", "nfc_suspend"; pinctrl-0 = <&nfc_int_active &nfc_enable_active &nfc_clk_default>; pinctrl-1 = <&nfc_int_suspend &nfc_enable_suspend>; clocks = <&clock_rpmh RPMH_LN_BB_CLK3>; clock-names = "ref_clk"; }; }; &qupv3_se10_i2c { status = "ok"; }; Loading