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Commit 70c65e47 authored by Greg Kroah-Hartman's avatar Greg Kroah-Hartman
Browse files

Merge 4.9.103 into android-4.9



Changes in 4.9.103
	net/mlx4_core: Fix error handling in mlx4_init_port_info.
	net: test tailroom before appending to linear skb
	packet: in packet_snd start writing at link layer allocation
	sock_diag: fix use-after-free read in __sk_free
	tcp: purge write queue in tcp_connect_init()
	vmxnet3: set the DMA mask before the first DMA map operation
	vmxnet3: use DMA memory barriers where required
	ext2: fix a block leak
	s390: add assembler macros for CPU alternatives
	s390: move expoline assembler macros to a header
	s390/crc32-vx: use expoline for indirect branches
	s390/lib: use expoline for indirect branches
	s390/ftrace: use expoline for indirect branches
	s390/kernel: use expoline for indirect branches
	s390: move spectre sysfs attribute code
	s390: extend expoline to BC instructions
	s390: use expoline thunks in the BPF JIT
	scsi: libsas: defer ata device eh commands to libata
	scsi: sg: allocate with __GFP_ZERO in sg_build_indirect()
	scsi: zfcp: fix infinite iteration on ERP ready list
	cfg80211: limit wiphy names to 128 bytes
	hfsplus: stop workqueue when fill_super() failed
	x86/kexec: Avoid double free_page() upon do_kexec_load() failure
	usb: gadget: f_uac2: fix bFirstInterface in composite gadget
	usb: dwc3: Undo PHY init if soft reset fails
	usb: dwc3: omap: don't miss events during suspend/resume
	usb: gadget: core: Fix use-after-free of usb_request
	usb: gadget: fsl_udc_core: fix ep valid checks
	usb: dwc2: Fix dwc2_hsotg_core_init_disconnected()
	usb: cdc_acm: prevent race at write to acm while system resumes
	USB: OHCI: Fix NULL dereference in HCDs using HCD_LOCAL_MEM
	net/usb/qmi_wwan.c: Add USB id for lt4120 modem
	net-usb: add qmi_wwan if on lte modem wistron neweb d18q1
	Bluetooth: btusb: Add USB ID 7392:a611 for Edimax EW-7611ULB
	ALSA: usb-audio: Add native DSD support for Luxman DA-06
	usb: dwc3: Add SoftReset PHY synchonization delay
	usb: dwc3: Update DWC_usb31 GTXFIFOSIZ reg fields
	xhci: zero usb device slot_id member when disabling and freeing a xhci slot
	usb: dwc2: Fix interval type issue
	usb: dwc2: host: Fix transaction errors in host mode
	usb: gadget: ffs: Let setup() return USB_GADGET_DELAYED_STATUS
	usb: gadget: ffs: Execute copy_to_user() with USER_DS set
	usb: gadget: udc: change comparison to bitshift when dealing with a mask
	usb: gadget: composite: fix incorrect handling of OS desc requests
	media: em28xx: USB bulk packet size fix
	Bluetooth: btusb: Add device ID for RTL8822BE
	staging: lustre: fix bug in osc_enter_cache_try
	staging: rtl8192u: return -ENOMEM on failed allocation of priv->oldaddr
	staging: lustre: lmv: correctly iput lmo_root
	crypto: sunxi-ss - Add MODULE_ALIAS to sun4i-ss
	scsi: fas216: fix sense buffer initialization
	scsi: ufs: Enable quirk to ignore sending WRITE_SAME command
	scsi: bnx2fc: Fix check in SCSI completion handler for timed out request
	scsi: sym53c8xx_2: iterator underflow in sym_getsync()
	scsi: mptfusion: Add bounds check in mptctl_hp_targetinfo()
	scsi: qla2xxx: Avoid triggering undefined behavior in qla2x00_mbx_completion()
	scsi: storvsc: Increase cmd_per_lun for higher speed devices
	scsi: aacraid: fix shutdown crash when init fails
	scsi: qla4xxx: skip error recovery in case of register disconnect.
	scsi: mpt3sas: Do not mark fw_event workqueue as WQ_MEM_RECLAIM
	scsi: sd: Keep disk read-only when re-reading partition
	scsi: aacraid: Insure command thread is not recursively stopped
	scsi: mvsas: fix wrong endianness of sgpio api
	scsi: lpfc: Fix issue_lip if link is disabled
	scsi: lpfc: Fix soft lockup in lpfc worker thread during LIP testing
	scsi: lpfc: Fix frequency of Release WQE CQEs
	ASoC: au1x: Fix timeout tests in au1xac97c_ac97_read()
	ASoC: topology: create TLV data for dapm widgets
	ASoC: samsung: i2s: Ensure the RCLK rate is properly determined
	clk: rockchip: Fix wrong parent for SDMMC phase clock for rk3228
	clk: Don't show the incorrect clock phase
	clk: tegra: Fix pll_u rate configuration
	media: cx23885: Set subdev host data to clk_freq pointer
	clk: rockchip: Prevent calculating mmc phase if clock rate is zero
	clk: samsung: s3c2410: Fix PLL rates
	clk: samsung: exynos7: Fix PLL rates
	clk: samsung: exynos5260: Fix PLL rates
	clk: samsung: exynos5433: Fix PLL rates
	clk: samsung: exynos5250: Fix PLL rates
	clk: samsung: exynos3250: Fix PLL rates
	media: dmxdev: fix error code for invalid ioctls
	media: cx23885: Override 888 ImpactVCBe crystal frequency
	media: s3c-camif: fix out-of-bounds array access
	media: vb2: Fix videobuf2 to map correct area
	media: vivid: fix incorrect capabilities for radio
	media: cx25821: prevent out-of-bounds read on array card
	serial: xuartps: Fix out-of-bounds access through DT alias
	serial: samsung: Fix out-of-bounds access through serial port index
	serial: mxs-auart: Fix out-of-bounds access through serial port index
	serial: imx: Fix out-of-bounds access through serial port index
	serial: fsl_lpuart: Fix out-of-bounds access through DT alias
	serial: arc_uart: Fix out-of-bounds access through DT alias
	serial: 8250: Don't service RX FIFO if interrupts are disabled
	rtc: snvs: Fix usage of snvs_rtc_enable
	rtc: hctosys: Ensure system time doesn't overflow time_t
	rtc: tx4939: avoid unintended sign extension on a 24 bit shift
	Linux 4.9.103

Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@google.com>
parents 2e35bed4 aa4b4ace
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VERSION = 4
PATCHLEVEL = 9
SUBLEVEL = 102
SUBLEVEL = 103
EXTRAVERSION =
NAME = Roaring Lionus

+4 −1
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@@ -12,6 +12,7 @@
 */

#include <linux/linkage.h>
#include <asm/nospec-insn.h>
#include <asm/vx-insn.h>

/* Vector register range containing CRC-32 constants */
@@ -66,6 +67,8 @@

.previous

	GEN_BR_THUNK %r14

.text
/*
 * The CRC-32 function(s) use these calling conventions:
@@ -202,6 +205,6 @@ ENTRY(crc32_be_vgfm_16)

.Ldone:
	VLGVF	%r2,%v2,3
	br	%r14
	BR_EX	%r14

.previous
+3 −1
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@@ -13,6 +13,7 @@
 */

#include <linux/linkage.h>
#include <asm/nospec-insn.h>
#include <asm/vx-insn.h>

/* Vector register range containing CRC-32 constants */
@@ -75,6 +76,7 @@

.previous

	GEN_BR_THUNK %r14

.text

@@ -263,6 +265,6 @@ crc32_le_vgfm_generic:

.Ldone:
	VLGVF	%r2,%v2,2
	br	%r14
	BR_EX	%r14

.previous
+108 −0
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/* SPDX-License-Identifier: GPL-2.0 */
#ifndef _ASM_S390_ALTERNATIVE_ASM_H
#define _ASM_S390_ALTERNATIVE_ASM_H

#ifdef __ASSEMBLY__

/*
 * Check the length of an instruction sequence. The length may not be larger
 * than 254 bytes and it has to be divisible by 2.
 */
.macro alt_len_check start,end
	.if ( \end - \start ) > 254
	.error "cpu alternatives does not support instructions blocks > 254 bytes\n"
	.endif
	.if ( \end - \start ) % 2
	.error "cpu alternatives instructions length is odd\n"
	.endif
.endm

/*
 * Issue one struct alt_instr descriptor entry (need to put it into
 * the section .altinstructions, see below). This entry contains
 * enough information for the alternatives patching code to patch an
 * instruction. See apply_alternatives().
 */
.macro alt_entry orig_start, orig_end, alt_start, alt_end, feature
	.long	\orig_start - .
	.long	\alt_start - .
	.word	\feature
	.byte	\orig_end - \orig_start
	.byte	\alt_end - \alt_start
.endm

/*
 * Fill up @bytes with nops. The macro emits 6-byte nop instructions
 * for the bulk of the area, possibly followed by a 4-byte and/or
 * a 2-byte nop if the size of the area is not divisible by 6.
 */
.macro alt_pad_fill bytes
	.fill	( \bytes ) / 6, 6, 0xc0040000
	.fill	( \bytes ) % 6 / 4, 4, 0x47000000
	.fill	( \bytes ) % 6 % 4 / 2, 2, 0x0700
.endm

/*
 * Fill up @bytes with nops. If the number of bytes is larger
 * than 6, emit a jg instruction to branch over all nops, then
 * fill an area of size (@bytes - 6) with nop instructions.
 */
.macro alt_pad bytes
	.if ( \bytes > 0 )
	.if ( \bytes > 6 )
	jg	. + \bytes
	alt_pad_fill \bytes - 6
	.else
	alt_pad_fill \bytes
	.endif
	.endif
.endm

/*
 * Define an alternative between two instructions. If @feature is
 * present, early code in apply_alternatives() replaces @oldinstr with
 * @newinstr. ".skip" directive takes care of proper instruction padding
 * in case @newinstr is longer than @oldinstr.
 */
.macro ALTERNATIVE oldinstr, newinstr, feature
	.pushsection .altinstr_replacement,"ax"
770:	\newinstr
771:	.popsection
772:	\oldinstr
773:	alt_len_check 770b, 771b
	alt_len_check 772b, 773b
	alt_pad ( ( 771b - 770b ) - ( 773b - 772b ) )
774:	.pushsection .altinstructions,"a"
	alt_entry 772b, 774b, 770b, 771b, \feature
	.popsection
.endm

/*
 * Define an alternative between two instructions. If @feature is
 * present, early code in apply_alternatives() replaces @oldinstr with
 * @newinstr. ".skip" directive takes care of proper instruction padding
 * in case @newinstr is longer than @oldinstr.
 */
.macro ALTERNATIVE_2 oldinstr, newinstr1, feature1, newinstr2, feature2
	.pushsection .altinstr_replacement,"ax"
770:	\newinstr1
771:	\newinstr2
772:	.popsection
773:	\oldinstr
774:	alt_len_check 770b, 771b
	alt_len_check 771b, 772b
	alt_len_check 773b, 774b
	.if ( 771b - 770b > 772b - 771b )
	alt_pad ( ( 771b - 770b ) - ( 774b - 773b ) )
	.else
	alt_pad ( ( 772b - 771b ) - ( 774b - 773b ) )
	.endif
775:	.pushsection .altinstructions,"a"
	alt_entry 773b, 775b, 770b, 771b,\feature1
	alt_entry 773b, 775b, 771b, 772b,\feature2
	.popsection
.endm

#endif	/*  __ASSEMBLY__  */

#endif /* _ASM_S390_ALTERNATIVE_ASM_H */
+195 −0
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/* SPDX-License-Identifier: GPL-2.0 */
#ifndef _ASM_S390_NOSPEC_ASM_H
#define _ASM_S390_NOSPEC_ASM_H

#include <asm/alternative-asm.h>
#include <asm/asm-offsets.h>

#ifdef __ASSEMBLY__

#ifdef CONFIG_EXPOLINE

_LC_BR_R1 = __LC_BR_R1

/*
 * The expoline macros are used to create thunks in the same format
 * as gcc generates them. The 'comdat' section flag makes sure that
 * the various thunks are merged into a single copy.
 */
	.macro __THUNK_PROLOG_NAME name
	.pushsection .text.\name,"axG",@progbits,\name,comdat
	.globl \name
	.hidden \name
	.type \name,@function
\name:
	.cfi_startproc
	.endm

	.macro __THUNK_EPILOG
	.cfi_endproc
	.popsection
	.endm

	.macro __THUNK_PROLOG_BR r1,r2
	__THUNK_PROLOG_NAME __s390x_indirect_jump_r\r2\()use_r\r1
	.endm

	.macro __THUNK_PROLOG_BC d0,r1,r2
	__THUNK_PROLOG_NAME __s390x_indirect_branch_\d0\()_\r2\()use_\r1
	.endm

	.macro __THUNK_BR r1,r2
	jg	__s390x_indirect_jump_r\r2\()use_r\r1
	.endm

	.macro __THUNK_BC d0,r1,r2
	jg	__s390x_indirect_branch_\d0\()_\r2\()use_\r1
	.endm

	.macro __THUNK_BRASL r1,r2,r3
	brasl	\r1,__s390x_indirect_jump_r\r3\()use_r\r2
	.endm

	.macro	__DECODE_RR expand,reg,ruse
	.set __decode_fail,1
	.irp r1,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15
	.ifc \reg,%r\r1
	.irp r2,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15
	.ifc \ruse,%r\r2
	\expand \r1,\r2
	.set __decode_fail,0
	.endif
	.endr
	.endif
	.endr
	.if __decode_fail == 1
	.error "__DECODE_RR failed"
	.endif
	.endm

	.macro	__DECODE_RRR expand,rsave,rtarget,ruse
	.set __decode_fail,1
	.irp r1,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15
	.ifc \rsave,%r\r1
	.irp r2,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15
	.ifc \rtarget,%r\r2
	.irp r3,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15
	.ifc \ruse,%r\r3
	\expand \r1,\r2,\r3
	.set __decode_fail,0
	.endif
	.endr
	.endif
	.endr
	.endif
	.endr
	.if __decode_fail == 1
	.error "__DECODE_RRR failed"
	.endif
	.endm

	.macro	__DECODE_DRR expand,disp,reg,ruse
	.set __decode_fail,1
	.irp r1,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15
	.ifc \reg,%r\r1
	.irp r2,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15
	.ifc \ruse,%r\r2
	\expand \disp,\r1,\r2
	.set __decode_fail,0
	.endif
	.endr
	.endif
	.endr
	.if __decode_fail == 1
	.error "__DECODE_DRR failed"
	.endif
	.endm

	.macro __THUNK_EX_BR reg,ruse
	# Be very careful when adding instructions to this macro!
	# The ALTERNATIVE replacement code has a .+10 which targets
	# the "br \reg" after the code has been patched.
#ifdef CONFIG_HAVE_MARCH_Z10_FEATURES
	exrl	0,555f
	j	.
#else
	.ifc \reg,%r1
	ALTERNATIVE "ex %r0,_LC_BR_R1", ".insn ril,0xc60000000000,0,.+10", 35
	j	.
	.else
	larl	\ruse,555f
	ex	0,0(\ruse)
	j	.
	.endif
#endif
555:	br	\reg
	.endm

	.macro __THUNK_EX_BC disp,reg,ruse
#ifdef CONFIG_HAVE_MARCH_Z10_FEATURES
	exrl	0,556f
	j	.
#else
	larl	\ruse,556f
	ex	0,0(\ruse)
	j	.
#endif
556:	b	\disp(\reg)
	.endm

	.macro GEN_BR_THUNK reg,ruse=%r1
	__DECODE_RR __THUNK_PROLOG_BR,\reg,\ruse
	__THUNK_EX_BR \reg,\ruse
	__THUNK_EPILOG
	.endm

	.macro GEN_B_THUNK disp,reg,ruse=%r1
	__DECODE_DRR __THUNK_PROLOG_BC,\disp,\reg,\ruse
	__THUNK_EX_BC \disp,\reg,\ruse
	__THUNK_EPILOG
	.endm

	.macro BR_EX reg,ruse=%r1
557:	__DECODE_RR __THUNK_BR,\reg,\ruse
	.pushsection .s390_indirect_branches,"a",@progbits
	.long	557b-.
	.popsection
	.endm

	 .macro B_EX disp,reg,ruse=%r1
558:	__DECODE_DRR __THUNK_BC,\disp,\reg,\ruse
	.pushsection .s390_indirect_branches,"a",@progbits
	.long	558b-.
	.popsection
	.endm

	.macro BASR_EX rsave,rtarget,ruse=%r1
559:	__DECODE_RRR __THUNK_BRASL,\rsave,\rtarget,\ruse
	.pushsection .s390_indirect_branches,"a",@progbits
	.long	559b-.
	.popsection
	.endm

#else
	.macro GEN_BR_THUNK reg,ruse=%r1
	.endm

	.macro GEN_B_THUNK disp,reg,ruse=%r1
	.endm

	 .macro BR_EX reg,ruse=%r1
	br	\reg
	.endm

	 .macro B_EX disp,reg,ruse=%r1
	b	\disp(\reg)
	.endm

	.macro BASR_EX rsave,rtarget,ruse=%r1
	basr	\rsave,\rtarget
	.endm
#endif

#endif /* __ASSEMBLY__ */

#endif /* _ASM_S390_NOSPEC_ASM_H */
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