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Commit 7075bc81 authored by Rusty Russell's avatar Rusty Russell Committed by Avi Kivity
Browse files

KVM: Use standard CR8 flags, and fix TPR definition 



Intel manual (and KVM definition) say the TPR is 4 bits wide.  Also fix
CR8_RESEVED_BITS typo.

Signed-off-by: default avatarRusty Russell <rusty@rustcorp.com.au>
Acked-by: default avatarH. Peter Anvin <hpa@zytor.com>
Signed-off-by: default avatarAvi Kivity <avi@qumranet.com>
parent 8fc0d085

drivers/kvm/kvm_main.c

+2 −2
Original line number Diff line number Diff line
@@ -92,7 +92,7 @@ static struct dentry *debugfs_dir; 
			  | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR	\

			  | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))



#define CR8_RESEVED_BITS (~0x0fULL)

#define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)

#define EFER_RESERVED_BITS 0xfffffffffffff2fe



#ifdef CONFIG_X86_64
@@ -625,7 +625,7 @@ EXPORT_SYMBOL_GPL(set_cr3); 


void set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)

{

	if ( cr8 & CR8_RESEVED_BITS) {

	if (cr8 & CR8_RESERVED_BITS) {

		printk(KERN_DEBUG "set_cr8: #GP, reserved bits 0x%lx\n", cr8);

		inject_gp(vcpu);

		return;

include/asm-x86/processor-flags.h

+1 −1
Original line number Diff line number Diff line
@@ -63,7 +63,7 @@ 
/*

 * x86-64 Task Priority Register, CR8

 */

#define X86_CR8_TPR	0x00000007 /* task priority register */

#define X86_CR8_TPR	0x0000000F /* task priority register */



/*

 * AMD and Transmeta use MSRs for configuration; see <asm/msr-index.h>