Commit 6fd97a9e authored Jan 20, 2017 by Alan Kwong

drm/msm/sde: initialize flush mask for command encoder



Flush mask is not initialized and sets random flush
bits during command encoder flush request. Initialize flush
mask to avoid incorrect flush request.

CRs-Fixed: 2009714
Change-Id: I76723f45d8fc92c9b7fa9ac496a4b34938204484
Signed-off-by: Alan Kwong <akwong@codeaurora.org>

parent 76c9d188

drivers/gpu/drm/msm/sde/sde_encoder_phys_cmd.c

+1 −1

Original line number	Diff line number	Diff line
		@@ -519,7 +519,7 @@ static void sde_encoder_phys_cmd_enable(struct sde_encoder_phys *phys_enc)
		struct sde_encoder_phys_cmd *cmd_enc =
		to_sde_encoder_phys_cmd(phys_enc);
		struct sde_hw_ctl *ctl;
		u32 flush_mask;
		u32 flush_mask = 0;
		int ret;

		if (!phys_enc \|\| !phys_enc->hw_ctl) {