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Commit 6fa06b0d authored by Tillmann Heidsieck's avatar Tillmann Heidsieck Committed by Borislav Petkov
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EDAC, mpc85xx: Fix PCIe error capture 



According to the reference manual of MPC8572 and T4240, bit 31 of
PEX_ERR_CAP_STAT is W1C (write 1 to clear).

Add the corresponding write to PEX_ERR_CAP_STAT in order to fix the PCIe
error capture.

Tested on a T4240 processor.

Signed-off-by: default avatarTillmann Heidsieck <theidsieck@leenox.de>
Acked-by: default avatarJohannes Thumshirn <jthumshirn@suse.de>
Cc: linux-edac <linux-edac@vger.kernel.org>
Link: http://lkml.kernel.org/r/20160815190849.29327-1-theidsieck@leenox.de


Signed-off-by: default avatarBorislav Petkov <bp@suse.de>
parent 7bb8b777

drivers/edac/mpc85xx_edac.c

+9 −3
Original line number Diff line number Diff line
@@ -187,14 +187,14 @@ static void mpc85xx_pci_check(struct edac_pci_ctl_info *pci) 
static void mpc85xx_pcie_check(struct edac_pci_ctl_info *pci)

{

	struct mpc85xx_pci_pdata *pdata = pci->pvt_info;

	u32 err_detect;

	u32 err_detect, err_cap_stat;



	err_detect = in_be32(pdata->pci_vbase + MPC85XX_PCI_ERR_DR);

	err_cap_stat = in_be32(pdata->pci_vbase + MPC85XX_PCI_GAS_TIMR);



	pr_err("PCIe error(s) detected\n");

	pr_err("PCIe ERR_DR register: 0x%08x\n", err_detect);

	pr_err("PCIe ERR_CAP_STAT register: 0x%08x\n",

			in_be32(pdata->pci_vbase + MPC85XX_PCI_GAS_TIMR));

	pr_err("PCIe ERR_CAP_STAT register: 0x%08x\n", err_cap_stat);

	pr_err("PCIe ERR_CAP_R0 register: 0x%08x\n",

			in_be32(pdata->pci_vbase + MPC85XX_PCIE_ERR_CAP_R0));

	pr_err("PCIe ERR_CAP_R1 register: 0x%08x\n",
@@ -206,6 +206,9 @@ static void mpc85xx_pcie_check(struct edac_pci_ctl_info *pci) 


	/* clear error bits */

	out_be32(pdata->pci_vbase + MPC85XX_PCI_ERR_DR, err_detect);



	/* reset error capture */

	out_be32(pdata->pci_vbase + MPC85XX_PCI_GAS_TIMR, err_cap_stat | 0x1);

}



static int mpc85xx_pcie_find_capability(struct device_node *np)
@@ -344,6 +347,9 @@ static int mpc85xx_pci_err_probe(struct platform_device *op) 
	/* clear error bits */

	out_be32(pdata->pci_vbase + MPC85XX_PCI_ERR_DR, ~0);



	/* reset error capture */

	out_be32(pdata->pci_vbase + MPC85XX_PCI_GAS_TIMR, 0x1);



	if (edac_pci_add_device(pci, pdata->edac_idx) > 0) {

		edac_dbg(3, "failed edac_pci_add_device()\n");

		goto err;