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Commit 6f158d5f authored by Ben Hutchings's avatar Ben Hutchings Committed by David S. Miller
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sfc: Add support for SFN4111T



Add support code for the SFN4111T 100/1000/10GBASE-T reference design,
based in part on the existing code for the SFE4001.

Signed-off-by: default avatarBen Hutchings <bhutchings@solarflare.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent e6fa2eb7
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+2 −0
Original line number Diff line number Diff line
@@ -241,6 +241,8 @@ struct efx_board_data {
static struct efx_board_data board_data[] = {
	{ EFX_BOARD_SFE4001, "SFE4001", "10GBASE-T adapter", sfe4001_init },
	{ EFX_BOARD_SFE4002, "SFE4002", "XFP adapter", sfe4002_init },
	{ EFX_BOARD_SFN4111T, "SFN4111T", "100/1000/10GBASE-T adapter",
	  sfn4111t_init },
};

void efx_set_board_info(struct efx_nic *efx, u16 revision_info)
+6 −1
Original line number Diff line number Diff line
@@ -12,11 +12,16 @@

/* Board IDs (must fit in 8 bits) */
enum efx_board_type {
	EFX_BOARD_SFE4001 = 1,   /* SFE4001 (10GBASE-T) */
	EFX_BOARD_SFE4001 = 1,
	EFX_BOARD_SFE4002 = 2,
	EFX_BOARD_SFN4111T = 0x51,
};

extern void efx_set_board_info(struct efx_nic *efx, u16 revision_info);

/* SFE4001 (10GBASE-T) */
extern int sfe4001_init(struct efx_nic *efx);
/* SFN4111T (100/1000/10GBASE-T) */
extern int sfn4111t_init(struct efx_nic *efx);

#endif
+7 −0
Original line number Diff line number Diff line
@@ -2971,6 +2971,13 @@ int falcon_init_nic(struct efx_nic *efx)
	EFX_SET_OWORD_FIELD(temp, ONCHIP_SRAM, 1);
	falcon_write(efx, &temp, NIC_STAT_REG);

	/* Set the source of the GMAC clock */
	if (falcon_rev(efx) == FALCON_REV_B0) {
		falcon_read(efx, &temp, GPIO_CTL_REG_KER);
		EFX_SET_OWORD_FIELD(temp, GPIO_USE_NIC_CLK, true);
		falcon_write(efx, &temp, GPIO_CTL_REG_KER);
	}

	/* Set buffer table mode */
	EFX_POPULATE_OWORD_1(temp, BUF_TBL_MODE, BUF_TBL_MODE_FULL);
	falcon_write(efx, &temp, BUF_TBL_CFG_REG_KER);
+2 −0
Original line number Diff line number Diff line
@@ -136,6 +136,8 @@

/* GPIO control register */
#define GPIO_CTL_REG_KER 0x0210
#define GPIO_USE_NIC_CLK_LBN (30)
#define GPIO_USE_NIC_CLK_WIDTH (1)
#define GPIO_OUTPUTS_LBN   (16)
#define GPIO_OUTPUTS_WIDTH (4)
#define GPIO_INPUTS_LBN (8)
+9 −2
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@@ -702,8 +702,15 @@ int efx_offline_test(struct efx_nic *efx,
	 */
	mutex_lock(&efx->mac_lock);
	efx->port_inhibited = true;
	if (efx->loopback_modes)
	if (efx->loopback_modes) {
		/* We need the 312 clock from the PHY to test the XMAC
		 * registers, so move into XGMII loopback if available */
		if (efx->loopback_modes & (1 << LOOPBACK_XGMII))
			efx->loopback_mode = LOOPBACK_XGMII;
		else
			efx->loopback_mode = __ffs(efx->loopback_modes);
	}

	__efx_reconfigure_port(efx);
	mutex_unlock(&efx->mac_lock);

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