drm/msm/sde: Correct IRQ mapping table for AD

IRQ dispatcher expects each interrupt register has a range of 32
indexes. This change adds reserved IRQ for AD0 and AD1 backlight
interrupts to match the expected 32 range indexes.

CRs-Fixed: 2093305
Change-Id: I973bac03af30213a27937809ec40c330ccb1b3ca
Signed-off-by: Ping Li <pingli@codeaurora.org>