Merge "msm: sde: rot: add parsing logic to get reg bw vote from DT"

				minimum allowable length configuration value.

- qcom,sde-ubwc-swizzle:	A u32 property to specify the default UBWC

				swizzle configuration value.

- qcom,rot-reg-bus:		Property to provide Bus scaling for register

				access for rotator blocks.

Subnode properties:

- compatible:		Compatible name used in smmu v2.

		cache-slice-names = "rotator";

		cache-slices = <&llcc 4>;

		rot_reg: qcom,rot-reg-bus {

			qcom,msm-bus,name = "mdss_rot_reg";

			qcom,msm-bus,num-cases = <2>;

			qcom,msm-bus,num-paths = <1>;

			qcom,msm-bus,active-only;

			qcom,msm-bus,vectors-KBps =

				<1 590 0 0>,

				<1 590 0 76800>;

		};

		smmu_rot_unsec: qcom,smmu_rot_unsec_cb {

			compatible = "qcom,smmu_sde_rot_unsec";

			iommus = <&mdp_smmu 0xe00>;

{

	int ret = 0, i;

	int usecases;

	struct device_node *node;

	mgr->data_bus.bus_scale_pdata = msm_bus_cl_get_pdata(dev);

	if (IS_ERR_OR_NULL(mgr->data_bus.bus_scale_pdata)) {

		}

	}

	node = of_get_child_by_name(dev->dev.of_node, "qcom,rot-reg-bus");

	if (node) {

		mgr->reg_bus.bus_scale_pdata

				= msm_bus_pdata_from_node(dev, node);

		if (IS_ERR_OR_NULL(mgr->reg_bus.bus_scale_pdata)) {

			SDEROT_ERR("reg bus pdata parsing failed\n");

			ret = PTR_ERR(mgr->reg_bus.bus_scale_pdata);

			if (!mgr->reg_bus.bus_scale_pdata)

				ret = -EINVAL;

			mgr->reg_bus.bus_scale_pdata = NULL;

		}

	} else {

		SDEROT_DBG(

			"no DT entries, configuring default reg bus table\n");

		mgr->reg_bus.bus_scale_pdata = &rot_reg_bus_scale_table;

		usecases = mgr->reg_bus.bus_scale_pdata->num_usecases;

		for (i = 0; i < usecases; i++) {

			rot_reg_bus_usecases[i].vectors =

				&rot_reg_bus_vectors[i];

		}

	}

	return ret;

}