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Commit 6e4c6196 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc 

Pull powerpc fixes from Ben Herrenschmidt:
 "A bit more endian problems found during testing of 3.13 and a few
  other simple fixes and regressions fixes"

* 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc:
  powerpc: Fix alignment of secondary cpu spin vars
  powerpc: Align p_end
  powernv/eeh: Add buffer for P7IOC hub error data
  powernv/eeh: Fix possible buffer overrun in ioda_eeh_phb_diag()
  powerpc: Make 64-bit non-VMX __copy_tofrom_user bi-endian
  powerpc: Make unaligned accesses endian-safe for powerpc
  powerpc: Fix bad stack check in exception entry
  powerpc/512x: dts: disable MPC5125 usb module
  powerpc/512x: dts: remove misplaced IRQ spec from 'soc' node (5125)
parents 67e0c1b0 f991db1c

arch/powerpc/boot/dts/mpc5125twr.dts

+5 −1
Original line number Diff line number Diff line
@@ -58,7 +58,6 @@ 
		compatible = "fsl,mpc5121-immr";

		#address-cells = <1>;

		#size-cells = <1>;

		#interrupt-cells = <2>;

		ranges = <0x0 0x80000000 0x400000>;

		reg = <0x80000000 0x400000>;

		bus-frequency = <66000000>;	// 66 MHz ips bus
@@ -189,6 +188,10 @@ 
			reg = <0xA000 0x1000>;

		};



		// disable USB1 port

		// TODO:

		// correct pinmux config and fix USB3320 ulpi dependency

		// before re-enabling it

		usb@3000 {

			compatible = "fsl,mpc5121-usb2-dr";

			reg = <0x3000 0x400>;
@@ -197,6 +200,7 @@ 
			interrupts = <43 0x8>;

			dr_mode = "host";

			phy_type = "ulpi";

			status = "disabled";

		};



		// 5125 PSCs are not 52xx or 5121 PSC compatible

arch/powerpc/include/asm/exception-64s.h

+1 −1
Original line number Diff line number Diff line
@@ -284,7 +284,7 @@ do_kvm_##n: \ 
	subi	r1,r1,INT_FRAME_SIZE;	/* alloc frame on kernel stack	*/ \

	beq-	1f;							   \

	ld	r1,PACAKSAVE(r13);	/* kernel stack to use		*/ \

1:	cmpdi	cr1,r1,0;		/* check if r1 is in userspace	*/ \

1:	cmpdi	cr1,r1,-INT_FRAME_SIZE;	/* check if r1 is in userspace	*/ \

	blt+	cr1,3f;			/* abort if it is		*/ \

	li	r1,(n);			/* will be reloaded later	*/ \

	sth	r1,PACA_TRAP_SAVE(r13);					   \

arch/powerpc/include/asm/unaligned.h

+6 −1
Original line number Diff line number Diff line
@@ -4,13 +4,18 @@ 
#ifdef __KERNEL__



/*

 * The PowerPC can do unaligned accesses itself in big endian mode.

 * The PowerPC can do unaligned accesses itself based on its endian mode.

 */

#include <linux/unaligned/access_ok.h>

#include <linux/unaligned/generic.h>



#ifdef __LITTLE_ENDIAN__

#define get_unaligned	__get_unaligned_le

#define put_unaligned	__put_unaligned_le

#else

#define get_unaligned	__get_unaligned_be

#define put_unaligned	__put_unaligned_be

#endif



#endif	/* __KERNEL__ */

#endif	/* _ASM_POWERPC_UNALIGNED_H */

arch/powerpc/kernel/head_64.S

+2 −0
Original line number Diff line number Diff line
@@ -80,6 +80,7 @@ END_FTR_SECTION(0, 1) 
	 * of the function that the cpu should jump to to continue

	 * initialization.

	 */

	.balign 8

	.globl  __secondary_hold_spinloop

__secondary_hold_spinloop:

	.llong	0x0
@@ -470,6 +471,7 @@ _STATIC(__after_prom_start) 
	mtctr	r8

	bctr



.balign 8

p_end:	.llong	_end - _stext



4:	/* Now copy the rest of the kernel up to _end */

arch/powerpc/lib/copyuser_64.S

+38 −15
Original line number Diff line number Diff line
@@ -9,6 +9,14 @@ 
#include <asm/processor.h>

#include <asm/ppc_asm.h>



#ifdef __BIG_ENDIAN__

#define sLd sld		/* Shift towards low-numbered address. */

#define sHd srd		/* Shift towards high-numbered address. */

#else

#define sLd srd		/* Shift towards low-numbered address. */

#define sHd sld		/* Shift towards high-numbered address. */

#endif



	.align	7

_GLOBAL(__copy_tofrom_user)

BEGIN_FTR_SECTION
@@ -118,10 +126,10 @@ END_FTR_SECTION_IFCLR(CPU_FTR_UNALIGNED_LD_STD) 


24:	ld	r9,0(r4)	/* 3+2n loads, 2+2n stores */

25:	ld	r0,8(r4)

	sld	r6,r9,r10

	sLd	r6,r9,r10

26:	ldu	r9,16(r4)

	srd	r7,r0,r11

	sld	r8,r0,r10

	sHd	r7,r0,r11

	sLd	r8,r0,r10

	or	r7,r7,r6

	blt	cr6,79f

27:	ld	r0,8(r4)
@@ -129,35 +137,35 @@ END_FTR_SECTION_IFCLR(CPU_FTR_UNALIGNED_LD_STD) 


28:	ld	r0,0(r4)	/* 4+2n loads, 3+2n stores */

29:	ldu	r9,8(r4)

	sld	r8,r0,r10

	sLd	r8,r0,r10

	addi	r3,r3,-8

	blt	cr6,5f

30:	ld	r0,8(r4)

	srd	r12,r9,r11

	sld	r6,r9,r10

	sHd	r12,r9,r11

	sLd	r6,r9,r10

31:	ldu	r9,16(r4)

	or	r12,r8,r12

	srd	r7,r0,r11

	sld	r8,r0,r10

	sHd	r7,r0,r11

	sLd	r8,r0,r10

	addi	r3,r3,16

	beq	cr6,78f



1:	or	r7,r7,r6

32:	ld	r0,8(r4)

76:	std	r12,8(r3)

2:	srd	r12,r9,r11

	sld	r6,r9,r10

2:	sHd	r12,r9,r11

	sLd	r6,r9,r10

33:	ldu	r9,16(r4)

	or	r12,r8,r12

77:	stdu	r7,16(r3)

	srd	r7,r0,r11

	sld	r8,r0,r10

	sHd	r7,r0,r11

	sLd	r8,r0,r10

	bdnz	1b



78:	std	r12,8(r3)

	or	r7,r7,r6

79:	std	r7,16(r3)

5:	srd	r12,r9,r11

5:	sHd	r12,r9,r11

	or	r12,r8,r12

80:	std	r12,24(r3)

	bne	6f
@@ -165,23 +173,38 @@ END_FTR_SECTION_IFCLR(CPU_FTR_UNALIGNED_LD_STD) 
	blr

6:	cmpwi	cr1,r5,8

	addi	r3,r3,32

	sld	r9,r9,r10

	sLd	r9,r9,r10

	ble	cr1,7f

34:	ld	r0,8(r4)

	srd	r7,r0,r11

	sHd	r7,r0,r11

	or	r9,r7,r9

7:

	bf	cr7*4+1,1f

#ifdef __BIG_ENDIAN__

	rotldi	r9,r9,32

#endif

94:	stw	r9,0(r3)

#ifdef __LITTLE_ENDIAN__

	rotrdi	r9,r9,32

#endif

	addi	r3,r3,4

1:	bf	cr7*4+2,2f

#ifdef __BIG_ENDIAN__

	rotldi	r9,r9,16

#endif

95:	sth	r9,0(r3)

#ifdef __LITTLE_ENDIAN__

	rotrdi	r9,r9,16

#endif

	addi	r3,r3,2

2:	bf	cr7*4+3,3f

#ifdef __BIG_ENDIAN__

	rotldi	r9,r9,8

#endif

96:	stb	r9,0(r3)

#ifdef __LITTLE_ENDIAN__

	rotrdi	r9,r9,8

#endif

3:	li	r3,0

	blr