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Commit 6ce94100 authored by Daniel Vetter's avatar Daniel Vetter
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drm/i915: paper over a pipe-enable vs pageflip race 



I've discovered this on my ivb machine while stress-testing the new
flip_tests. Only harmful effect observed is that the timestamp is a
bit bogus.

Note that this is empirical duct-tape: I've noticed that we seem to
only ever miss the very first vblank irq right after enabling the
pipe. And with this hack applied I couldn't reproduce the failure case
anywhere else any more.

Tested-by: default avatarImre Deak <imre.deak@intel.com>
Reviewed-by: default avatarImre Deak <imre.deak@intel.com>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent c77d7162

drivers/gpu/drm/i915/intel_display.c

+10 −0
Original line number Diff line number Diff line
@@ -3253,6 +3253,16 @@ static void ironlake_crtc_enable(struct drm_crtc *crtc) 


	if (HAS_PCH_CPT(dev))

		intel_cpt_verify_modeset(dev, intel_crtc->pipe);



	/*

	 * There seems to be a race in PCH platform hw (at least on some

	 * outputs) where an enabled pipe still completes any pageflip right

	 * away (as if the pipe is off) instead of waiting for vblank. As soon

	 * as the first vblank happend, everything works as expected. Hence just

	 * wait for one vblank before returning to avoid strange things

	 * happening.

	 */

	intel_wait_for_vblank(dev, intel_crtc->pipe);

}



static void ironlake_crtc_disable(struct drm_crtc *crtc)