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Commit 6c646143 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'timers-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip 

Pull timer changes from Ingo Molnar:
  - ARM clocksource/clockevent improvements and fixes
  - generic timekeeping updates: TAI fixes/improvements, cleanups
  - Posix cpu timer cleanups and improvements
  - dynticks updates: full dynticks bugfixes, optimizations and cleanups

* 'timers-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (46 commits)
  clocksource: Timer-sun5i: Switch to sched_clock_register()
  timekeeping: Remove comment that's mostly out of date
  rtc-cmos: Add an alarm disable quirk
  timekeeper: fix comment typo for tk_setup_internals()
  timekeeping: Fix missing timekeeping_update in suspend path
  timekeeping: Fix CLOCK_TAI timer/nanosleep delays
  tick/timekeeping: Call update_wall_time outside the jiffies lock
  timekeeping: Avoid possible deadlock from clock_was_set_delayed
  timekeeping: Fix potential lost pv notification of time change
  timekeeping: Fix lost updates to tai adjustment
  clocksource: sh_cmt: Add clk_prepare/unprepare support
  clocksource: bcm_kona_timer: Remove unused bcm_timer_ids
  clocksource: vt8500: Remove deprecated IRQF_DISABLED
  clocksource: tegra: Remove deprecated IRQF_DISABLED
  clocksource: misc drivers: Remove deprecated IRQF_DISABLED
  clocksource: sh_mtu2: Remove unnecessary platform_set_drvdata()
  clocksource: sh_tmu: Remove unnecessary platform_set_drvdata()
  clocksource: armada-370-xp: Enable timer divider only when needed
  clocksource: clksrc-of: Warn if no clock sources are found
  clocksource: orion: Switch to sched_clock_register()
  ...
parents a0fa1dd3 00e2bcd6

Documentation/devicetree/bindings/timer/allwinner,sun5i-a13-hstimer.txt

0 → 100644
+22 −0
Original line number Diff line number Diff line 
Allwinner SoCs High Speed Timer Controller



Required properties:



- compatible :	should be "allwinner,sun5i-a13-hstimer" or

		"allwinner,sun7i-a20-hstimer"

- reg : Specifies base physical address and size of the registers.

- interrupts :	The interrupts of these timers (2 for the sun5i IP, 4 for the sun7i

		one)

- clocks: phandle to the source clock (usually the AHB clock)



Example:



timer@01c60000 {

	compatible = "allwinner,sun7i-a20-hstimer";

	reg = <0x01c60000 0x1000>;

	interrupts = <0 51 1>,

		     <0 52 1>,

		     <0 53 1>,

		     <0 54 1>;

	clocks = <&ahb1_gates 19>;

};

arch/arm/boot/dts/sun5i-a10s.dtsi

+7 −0
Original line number Diff line number Diff line
@@ -332,5 +332,12 @@ 
			clock-frequency = <100000>;

			status = "disabled";

		};



		timer@01c60000 {

			compatible = "allwinner,sun5i-a13-hstimer";

			reg = <0x01c60000 0x1000>;

			interrupts = <82>, <83>;

			clocks = <&ahb_gates 28>;

		};

	};

};

arch/arm/boot/dts/sun5i-a13.dtsi

+7 −0
Original line number Diff line number Diff line
@@ -273,5 +273,12 @@ 
			clock-frequency = <100000>;

			status = "disabled";

		};



		timer@01c60000 {

			compatible = "allwinner,sun5i-a13-hstimer";

			reg = <0x01c60000 0x1000>;

			interrupts = <82>, <83>;

			clocks = <&ahb_gates 28>;

		};

	};

};

arch/arm/boot/dts/sun7i-a20.dtsi

+10 −0
Original line number Diff line number Diff line
@@ -395,6 +395,16 @@ 
			status = "disabled";

		};



		hstimer@01c60000 {

			compatible = "allwinner,sun7i-a20-hstimer";

			reg = <0x01c60000 0x1000>;

			interrupts = <0 81 1>,

				     <0 82 1>,

				     <0 83 1>,

				     <0 84 1>;

			clocks = <&ahb_gates 28>;

		};



		gic: interrupt-controller@01c81000 {

			compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";

			reg = <0x01c81000 0x1000>,

arch/arm/mach-sunxi/Kconfig

+1 −0
Original line number Diff line number Diff line
@@ -12,3 +12,4 @@ config ARCH_SUNXI 
	select PINCTRL_SUNXI

	select SPARSE_IRQ

	select SUN4I_TIMER

	select SUN5I_HSTIMER