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Commit 6bdd4b3f authored by Mitchel Humpherys's avatar Mitchel Humpherys Committed by Patrick Daly
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iommu/io-pgtable-fast: Support SMMU coherent page tables 



Some SMMUs can walk page tables in the CPU cache.  Enable this
behavior for SMMUs whose device tree node has the `coherent' property
set.

Change-Id: I7b00bc7746dafe99b392be02fee8a3e8903427a5
Signed-off-by: default avatarMitchel Humpherys <mitchelh@codeaurora.org>
Signed-off-by: default avatarPatrick Daly <pdaly@codeaurora.org>
parent 78aa480d

drivers/iommu/io-pgtable-fast.c

+6 −2
Original line number Diff line number Diff line
@@ -437,6 +437,10 @@ av8l_fast_alloc_pgtable(struct io_pgtable_cfg *cfg, void *cookie) 
		reg = (AV8L_FAST_TCR_SH_OS << AV8L_FAST_TCR_SH0_SHIFT) |

			(AV8L_FAST_TCR_RGN_NC << AV8L_FAST_TCR_IRGN0_SHIFT) |

			(AV8L_FAST_TCR_RGN_WBWA << AV8L_FAST_TCR_ORGN0_SHIFT);

	else if (cfg->iommu_dev && cfg->iommu_dev->archdata.dma_coherent)

		reg = (AV8L_FAST_TCR_SH_OS << AV8L_FAST_TCR_SH0_SHIFT) |

			(AV8L_FAST_TCR_RGN_WBWA << AV8L_FAST_TCR_IRGN0_SHIFT) |

			(AV8L_FAST_TCR_RGN_WBWA << AV8L_FAST_TCR_ORGN0_SHIFT);

	else

		reg = (AV8L_FAST_TCR_SH_IS << AV8L_FAST_TCR_SH0_SHIFT) |

			(AV8L_FAST_TCR_RGN_NC << AV8L_FAST_TCR_IRGN0_SHIFT) |