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Commit 6bb6b297 authored by Huang Rui's avatar Huang Rui Committed by Alex Deucher
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drm/amdgpu: add powercontainment module parameter



This patch makes powercontainment feature configurable. Currently, the
powercontainment is not very stable, so add a module parameter to
enable/disable it via user mode.

Signed-off-by: default avatarHuang Rui <ray.huang@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent c5f74f78
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+1 −0
Original line number Diff line number Diff line
@@ -85,6 +85,7 @@ extern int amdgpu_vm_debug;
extern int amdgpu_sched_jobs;
extern int amdgpu_sched_hw_submission;
extern int amdgpu_powerplay;
extern int amdgpu_powercontainment;
extern unsigned amdgpu_pcie_gen_cap;
extern unsigned amdgpu_pcie_lane_cap;

+4 −0
Original line number Diff line number Diff line
@@ -82,6 +82,7 @@ int amdgpu_exp_hw_support = 0;
int amdgpu_sched_jobs = 32;
int amdgpu_sched_hw_submission = 2;
int amdgpu_powerplay = -1;
int amdgpu_powercontainment = 1;
unsigned amdgpu_pcie_gen_cap = 0;
unsigned amdgpu_pcie_lane_cap = 0;

@@ -160,6 +161,9 @@ module_param_named(sched_hw_submission, amdgpu_sched_hw_submission, int, 0444);
#ifdef CONFIG_DRM_AMD_POWERPLAY
MODULE_PARM_DESC(powerplay, "Powerplay component (1 = enable, 0 = disable, -1 = auto (default))");
module_param_named(powerplay, amdgpu_powerplay, int, 0444);

MODULE_PARM_DESC(powercontainment, "Power Containment (1 = enable (default), 0 = disable)");
module_param_named(powercontainment, amdgpu_powercontainment, int, 0444);
#endif

MODULE_PARM_DESC(pcie_gen_cap, "PCIE Gen Caps (0: autodetect (default))");
+1 −0
Original line number Diff line number Diff line
@@ -52,6 +52,7 @@ static int amdgpu_powerplay_init(struct amdgpu_device *adev)
		pp_init->chip_family = adev->family;
		pp_init->chip_id = adev->asic_type;
		pp_init->device = amdgpu_cgs_create_device(adev);
		pp_init->powercontainment_enabled = amdgpu_powercontainment;

		ret = amd_powerplay_init(pp_init, amd_pp);
		kfree(pp_init);
+8 −7
Original line number Diff line number Diff line
@@ -72,20 +72,21 @@ void fiji_initialize_power_tune_defaults(struct pp_hwmgr *hwmgr)
	fiji_hwmgr->dte_tj_offset = tmp;

	if (!tmp) {
		phm_cap_set(hwmgr->platform_descriptor.platformCaps,
				PHM_PlatformCaps_PowerContainment);

		phm_cap_set(hwmgr->platform_descriptor.platformCaps,
				PHM_PlatformCaps_CAC);

		fiji_hwmgr->fast_watermark_threshold = 100;

		if (hwmgr->powercontainment_enabled) {
			phm_cap_set(hwmgr->platform_descriptor.platformCaps,
				    PHM_PlatformCaps_PowerContainment);
			tmp = 1;
			fiji_hwmgr->enable_dte_feature = tmp ? false : true;
			fiji_hwmgr->enable_tdc_limit_feature = tmp ? true : false;
			fiji_hwmgr->enable_pkg_pwr_tracking_feature = tmp ? true : false;
		}
	}
}

/* PPGen has the gain setting generated in x * 100 unit
 * This function is to convert the unit to x * 4096(0x1000) unit.
+1 −0
Original line number Diff line number Diff line
@@ -58,6 +58,7 @@ int hwmgr_init(struct amd_pp_init *pp_init, struct pp_instance *handle)
	hwmgr->hw_revision = pp_init->rev_id;
	hwmgr->usec_timeout = AMD_MAX_USEC_TIMEOUT;
	hwmgr->power_source = PP_PowerSource_AC;
	hwmgr->powercontainment_enabled = pp_init->powercontainment_enabled;

	switch (hwmgr->chip_family) {
	case AMD_FAMILY_CZ:
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