Commit 6bb16fa5 authored Sep 30, 2017 by John David Anglin Committed by Greg Kroah-Hartman Oct 27, 2017

parisc: Fix double-word compare and exchange in LWS code on 32-bit kernels



commit 374b3bf8e8b519f61eb9775888074c6e46b3bf0c upstream.

As discussed on the debian-hppa list, double-wordcompare and exchange
operations fail on 32-bit kernels.  Looking at the code, I realized that
the ",ma" completer does the wrong thing in the  "ldw,ma  4(%r26), %r29"
instruction.  This increments %r26 and causes the following store to
write to the wrong location.

Note by Helge Deller:
The patch applies cleanly to stable kernel series if this upstream
commit is merged in advance:
f4125cfd ("parisc: Avoid trashing sr2 and sr3 in LWS code").

Signed-off-by: John David Anglin <dave.anglin@bell.net>
Tested-by: Christoph Biedl <debian.axhn@manchmal.in-ulm.de>
Fixes: 89206491 ("parisc: Implement new LWS CAS supporting 64 bit operations.")
Signed-off-by: Helge Deller <deller@gmx.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

parent 6f0eefab

arch/parisc/kernel/syscall.S

+3 −3

Original line number	Diff line number	Diff line
		@@ -742,7 +742,7 @@ lws_compare_and_swap_2:
		10: ldd 0(%r25), %r25
		11: ldd 0(%r24), %r24
		#else
		/* Load new value into r22/r23 - high/low */
		/* Load old value into r22/r23 - high/low */
		10: ldw 0(%r25), %r22
		11: ldw 4(%r25), %r23
		/* Load new value into fr4 for atomic store later */
		@@ -834,11 +834,11 @@ cas2_action:
		copy %r0, %r28
		#else
		/* Compare first word */
		19: ldw,ma 0(%r26), %r29
		19: ldw 0(%r26), %r29
		sub,= %r29, %r22, %r0
		b,n cas2_end
		/* Compare second word */
		20: ldw,ma 4(%r26), %r29
		20: ldw 4(%r26), %r29
		sub,= %r29, %r23, %r0
		b,n cas2_end
		/* Perform the store */