Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 6ba7a947 authored by Harshdeep Dhatt's avatar Harshdeep Dhatt
Browse files

msm: kgsl: Add CCU_INVALIDATE packets for A6XX 



Add the CCU_INVALIDATE_DEPTH and CCU_INVALIDATE_COLOR
EVENT_WRITE packets after every submission as a workaround.
The problem is that GMU FW asserts that the CCUCACHEDIRTY mask
is not set, before it does the SPTPRAC power collapse. However,
the UMD sometimes doesn’t invalidate the cache for performance
reasons.
Add the CCU_INVALIDATE_DEPTH and CCU_INVALIDATE_COLOR
EVENT_WRITE packets after every submission as a KMD workaround.
Add these packets before the end IBlist SET_MARKER packet.

Change-Id: I93cd3dd3efafdfcfd0dec9dd17927e939dfc0a8a
Signed-off-by: default avatarHarshdeep Dhatt <hdhatt@codeaurora.org>
parent 11042c52

drivers/gpu/msm/adreno.h

+2 −0
Original line number Original line Diff line number Diff line
@@ -893,6 +893,8 @@ struct adreno_gpudev { 
	int (*soft_reset)(struct adreno_device *);

	int (*soft_reset)(struct adreno_device *);

	bool (*gx_is_on)(struct adreno_device *);

	bool (*gx_is_on)(struct adreno_device *);

	bool (*sptprac_is_on)(struct adreno_device *);

	bool (*sptprac_is_on)(struct adreno_device *);

	unsigned int (*ccu_invalidate)(struct adreno_device *adreno_dev,

				unsigned int *cmds);

};

};





/**

/**

drivers/gpu/msm/adreno_a6xx.c

+15 −0
Original line number Original line Diff line number Diff line
@@ -2874,6 +2874,20 @@ static void a6xx_platform_setup(struct adreno_device *adreno_dev) 
}

}









static unsigned int a6xx_ccu_invalidate(struct adreno_device *adreno_dev,

	unsigned int *cmds)

{

	/* CCU_INVALIDATE_DEPTH */

	*cmds++ = cp_packet(adreno_dev, CP_EVENT_WRITE, 1);

	*cmds++ = 24;



	/* CCU_INVALIDATE_COLOR */

	*cmds++ = cp_packet(adreno_dev, CP_EVENT_WRITE, 1);

	*cmds++ = 25;



	return 4;

}



/* Register offset defines for A6XX, in order of enum adreno_regs */

/* Register offset defines for A6XX, in order of enum adreno_regs */

static unsigned int a6xx_register_offsets[ADRENO_REG_REGISTER_MAX] = {

static unsigned int a6xx_register_offsets[ADRENO_REG_REGISTER_MAX] = {
@@ -3032,4 +3046,5 @@ struct adreno_gpudev adreno_a6xx_gpudev = { 
	.preemption_context_destroy = a6xx_preemption_context_destroy,

	.preemption_context_destroy = a6xx_preemption_context_destroy,

	.gx_is_on = a6xx_gx_is_on,

	.gx_is_on = a6xx_gx_is_on,

	.sptprac_is_on = a6xx_sptprac_is_on,

	.sptprac_is_on = a6xx_sptprac_is_on,

	.ccu_invalidate = a6xx_ccu_invalidate,

};
 
};

drivers/gpu/msm/adreno_ringbuffer.c

+6 −0
Original line number Original line Diff line number Diff line
@@ -877,6 +877,9 @@ int adreno_ringbuffer_submitcmd(struct adreno_device *adreno_dev, 
	if (gpudev->set_marker)

	if (gpudev->set_marker)

		dwords += 4;

		dwords += 4;





	if (gpudev->ccu_invalidate)

		dwords += 4;



	link = kcalloc(dwords, sizeof(unsigned int), GFP_KERNEL);

	link = kcalloc(dwords, sizeof(unsigned int), GFP_KERNEL);

	if (!link) {

	if (!link) {

		ret = -ENOMEM;

		ret = -ENOMEM;
@@ -930,6 +933,9 @@ int adreno_ringbuffer_submitcmd(struct adreno_device *adreno_dev, 
		}

		}

	}

	}





	if (gpudev->ccu_invalidate)

		cmds += gpudev->ccu_invalidate(adreno_dev, cmds);



	if (gpudev->set_marker)

	if (gpudev->set_marker)

		cmds += gpudev->set_marker(cmds, 0);

		cmds += gpudev->set_marker(cmds, 0);