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Commit 6b80b247 authored by Stanislav Fomichev's avatar Stanislav Fomichev Committed by Greg Kroah-Hartman
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brcm80211: update PCI config space define



- replaced sizeof(struct pci_config_regs) with exact size; removed
  struct
- cleaned up the rest of broadcom PCI specific defines

Signed-off-by: default avatarStanislav Fomichev <kernel@fomichev.me>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@suse.de>
parent b68692e7
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+17 −50
Original line number Diff line number Diff line
@@ -19,39 +19,8 @@

#include <linux/pci_regs.h>

/* The actual config space */

#define	PCI_BAR_MAX		6

#define	PCR_RSVDA_MAX		2

typedef struct _pci_config_regs {
	u16 vendor;
	u16 device;
	u16 command;
	u16 status;
	u8 rev_id;
	u8 prog_if;
	u8 sub_class;
	u8 base_class;
	u8 cache_line_size;
	u8 latency_timer;
	u8 header_type;
	u8 bist;
	u32 base[PCI_BAR_MAX];
	u32 cardbus_cis;
	u16 subsys_vendor;
	u16 subsys_id;
	u32 baserom;
	u32 rsvd_a[PCR_RSVDA_MAX];
	u8 int_line;
	u8 int_pin;
	u8 min_gnt;
	u8 max_lat;
	u8 dev_dep[192];
} pci_config_regs;

#define	SZPCR		(sizeof (pci_config_regs))
/* PCI configuration address space size */
#define PCI_SZPCR		256

/* Everything below is BRCM HND proprietary */

@@ -59,6 +28,7 @@ typedef struct _pci_config_regs {
#define PCI_BAR0_WIN		0x80	/* backplane address space accessed by BAR0 */
#define PCI_SPROM_CONTROL	0x88	/* sprom property control */
#define PCI_INT_MASK		0x94	/* mask of PCI and other cores interrupts */
#define  PCI_SBIM_SHIFT		8	/* backplane core interrupt mask bits offset */
#define PCI_BAR0_WIN2		0xac	/* backplane address space accessed by second 4KB of BAR0 */
#define PCI_GPIO_IN		0xb0	/* pci config space gpio input (>=rev3) */
#define PCI_GPIO_OUT		0xb4	/* pci config space gpio output (>=rev3) */
@@ -77,7 +47,4 @@ typedef struct _pci_config_regs {

#define PCI_SBIM_STATUS_SERR	0x4	/* backplane SBErr interrupt status */

/* PCI_INT_MASK */
#define	PCI_SBIM_SHIFT		8	/* backplane core interrupt mask bits offset */

#endif				/* _h_pcicfg_ */
+2 −2
Original line number Diff line number Diff line
@@ -166,8 +166,8 @@ pcicore_find_pci_capability(void *dev, u8 req_cap_id,
		*buflen = 0;
		/* copy the cpability data excluding cap ID and next ptr */
		cap_data = cap_ptr + 2;
		if ((bufsize + cap_data) > SZPCR)
			bufsize = SZPCR - cap_data;
		if ((bufsize + cap_data) > PCI_SZPCR)
			bufsize = PCI_SZPCR - cap_data;
		*buflen = bufsize;
		while (bufsize--) {
			pci_read_config_byte(dev, cap_data, buf);