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Commit 6af24231 authored by Boris Brezillon's avatar Boris Brezillon Committed by Greg Kroah-Hartman
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clk: bcm2835: De-assert/assert PLL reset signal when appropriate 



commit 753872373b599384ac7df809aa61ea12d1c4d5d1 upstream.

In order to enable a PLL, not only the PLL has to be powered up and
locked, but you also have to de-assert the reset signal. The last part
was missing. Add it so PLLs that were not enabled by the FW/bootloader
can be enabled from Linux.

Fixes: 41691b88 ("clk: bcm2835: Add support for programming the audio domain clocks")
Cc: <stable@vger.kernel.org>
Signed-off-by: default avatarBoris Brezillon <boris.brezillon@bootlin.com>
Reviewed-by: default avatarEric Anholt <eric@anholt.net>
Signed-off-by: default avatarStephen Boyd <sboyd@kernel.org>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 5971ee25

drivers/clk/bcm/clk-bcm2835.c

+5 −3
Original line number Diff line number Diff line
@@ -545,9 +545,7 @@ static void bcm2835_pll_off(struct clk_hw *hw) 
	const struct bcm2835_pll_data *data = pll->data;



	spin_lock(&cprman->regs_lock);

	cprman_write(cprman, data->cm_ctrl_reg,

		     cprman_read(cprman, data->cm_ctrl_reg) |

		     CM_PLL_ANARST);

	cprman_write(cprman, data->cm_ctrl_reg, CM_PLL_ANARST);

	cprman_write(cprman, data->a2w_ctrl_reg,

		     cprman_read(cprman, data->a2w_ctrl_reg) |

		     A2W_PLL_CTRL_PWRDN);
@@ -583,6 +581,10 @@ static int bcm2835_pll_on(struct clk_hw *hw) 
		cpu_relax();

	}



	cprman_write(cprman, data->a2w_ctrl_reg,

		     cprman_read(cprman, data->a2w_ctrl_reg) |

		     A2W_PLL_CTRL_PRST_DISABLE);



	return 0;

}