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Commit 69399ee9 authored by Kevin Hao's avatar Kevin Hao Committed by Scott Wood
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powerpc/e6500: hw tablewalk: optimize a bit for tcd lock acquiring codes 



It makes no sense to put the instructions for calculating the lock
value (cpu number + 1) and the clearing of eq bit of cr1 in lbarx/stbcx
loop. And when the lock is acquired by the other thread, the current
lock value has no chance to equal with the lock value used by current
cpu. So we can skip the comparing for these two lock values in the
lbz/bne loop.

Signed-off-by: default avatarKevin Hao <haokexin@gmail.com>
Signed-off-by: default avatarScott Wood <scottwood@freescale.com>
parent e5e55cc0

arch/powerpc/mm/tlb_low_64e.S

+5 −5
Original line number Diff line number Diff line
@@ -308,11 +308,11 @@ BEGIN_FTR_SECTION /* CPU_FTR_SMT */ 
	 *

	 * MAS6:IND should be already set based on MAS4

	 */

1:	lbarx	r15,0,r11

	lhz	r10,PACAPACAINDEX(r13)

	cmpdi	r15,0

	cmpdi	cr1,r15,1	/* set cr1.eq = 0 for non-recursive */

	addi	r10,r10,1

	crclr	cr1*4+eq	/* set cr1.eq = 0 for non-recursive */

1:	lbarx	r15,0,r11

	cmpdi	r15,0

	bne	2f

	stbcx.	r10,0,r11

	bne	1b
@@ -320,9 +320,9 @@ BEGIN_FTR_SECTION /* CPU_FTR_SMT */ 
	.subsection 1

2:	cmpd	cr1,r15,r10	/* recursive lock due to mcheck/crit/etc? */

	beq	cr1,3b		/* unlock will happen if cr1.eq = 0 */

	lbz	r15,0(r11)

10:	lbz	r15,0(r11)

	cmpdi	r15,0

	bne	2b

	bne	10b

	b	1b

	.previous