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Commit 68c26a3a authored by Jayamohan Kallickal's avatar Jayamohan Kallickal Committed by James Bottomley
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[SCSI] be2iscsi: Fix MSIx creation for SKH-R adapter



The MSIx to be created for SKH-R adapter should be based on
eq_count returned by get_fw_config.

Signed-off-by: default avatarJohn Soni Jose <sony.john-n@emulex.com>
Signed-off-by: default avatarJayamohan Kallickal <jayamohan.kallickal@emulex.com>
Signed-off-by: default avatarJames Bottomley <JBottomley@Parallels.com>
parent d3fea9af
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+29 −16
Original line number Diff line number Diff line
@@ -3758,8 +3758,19 @@ static void find_num_cpus(struct beiscsi_hba *phba)
				  BEISCSI_MAX_NUM_CPUS : num_cpus;
		break;
	case BE_GEN4:
		phba->num_cpus = (num_cpus > OC_SKH_MAX_NUM_CPUS) ?
				  OC_SKH_MAX_NUM_CPUS : num_cpus;
		/*
		 * If eqid_count == 1 fall back to
		 * INTX mechanism
		 **/
		if (phba->fw_config.eqid_count == 1) {
			enable_msix = 0;
			phba->num_cpus = 1;
			return;
		}

		phba->num_cpus =
			(num_cpus > (phba->fw_config.eqid_count - 1)) ?
			(phba->fw_config.eqid_count - 1) : num_cpus;
		break;
	default:
		phba->num_cpus = 1;
@@ -5275,20 +5286,6 @@ static int beiscsi_dev_probe(struct pci_dev *pcidev,
		phba->generation = 0;
	}

	if (enable_msix)
		find_num_cpus(phba);
	else
		phba->num_cpus = 1;

	beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
		    "BM_%d : num_cpus = %d\n",
		    phba->num_cpus);

	if (enable_msix) {
		beiscsi_msix_enable(phba);
		if (!phba->msix_enabled)
			phba->num_cpus = 1;
	}
	ret = be_ctrl_init(phba, pcidev);
	if (ret) {
		beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
@@ -5320,6 +5317,22 @@ static int beiscsi_dev_probe(struct pci_dev *pcidev,
			    "BM_%d : Error getting fw config\n");
		goto free_port;
	}

	if (enable_msix)
		find_num_cpus(phba);
	else
		phba->num_cpus = 1;

	beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
		    "BM_%d : num_cpus = %d\n",
		    phba->num_cpus);

	if (enable_msix) {
		beiscsi_msix_enable(phba);
		if (!phba->msix_enabled)
			phba->num_cpus = 1;
	}

	phba->shost->max_id = phba->params.cxns_per_ctrl;
	beiscsi_get_params(phba);
	phba->shost->can_queue = phba->params.ios_per_ctrl;
+2 −1
Original line number Diff line number Diff line
@@ -65,7 +65,6 @@

#define MAX_CPUS		64
#define BEISCSI_MAX_NUM_CPUS	7
#define OC_SKH_MAX_NUM_CPUS	31

#define BEISCSI_VER_STRLEN 32

@@ -377,6 +376,8 @@ struct beiscsi_hba {
		 * for cid to cri conversion
		 */
		unsigned int phys_port;
		unsigned int eqid_count;
		unsigned int cqid_count;
		unsigned int iscsi_cid_start[BEISCSI_ULP_COUNT];
#define BEISCSI_GET_CID_COUNT(phba, ulp_num) \
		(phba->fw_config.iscsi_cid_count[ulp_num])
+11 −0
Original line number Diff line number Diff line
@@ -311,6 +311,17 @@ int mgmt_get_fw_config(struct be_ctrl_info *ctrl,
		struct be_fw_cfg *pfw_cfg;
		pfw_cfg = req;

		if (!is_chip_be2_be3r(phba)) {
			phba->fw_config.eqid_count = pfw_cfg->eqid_count;
			phba->fw_config.cqid_count = pfw_cfg->cqid_count;

			beiscsi_log(phba, KERN_INFO,
				    BEISCSI_LOG_INIT,
				    "BG_%d : EQ_Count : %d CQ_Count : %d\n",
				    phba->fw_config.eqid_count,
				    phba->fw_config.cqid_count);
		}

		for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++)
			if (pfw_cfg->ulp[ulp_num].ulp_mode &
			    BEISCSI_ULP_ISCSI_INI_MODE)