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Commit 68b94d6c authored by James Liao's avatar James Liao Committed by Greg Kroah-Hartman
Browse files

arm: dts: mt2701: Add subsystem clock controller device nodes 




[ Upstream commit f235c7e7a75325f28a33559a71f25a0eca6112db ]

Add MT2701 subsystem clock controllers, inlcude mmsys, imgsys,
vdecsys, hifsys, ethsys and bdpsys.

Signed-off-by: default avatarJames Liao <jamesjj.liao@mediatek.com>
Signed-off-by: default avatarMatthias Brugger <matthias.bgg@gmail.com>
Signed-off-by: default avatarSasha Levin <alexander.levin@verizon.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent b2e7d1f7

arch/arm/boot/dts/mt2701.dtsi

+36 −0
Original line number Diff line number Diff line
@@ -174,4 +174,40 @@ 
		clocks = <&uart_clk>;

		status = "disabled";

	};



	mmsys: syscon@14000000 {

		compatible = "mediatek,mt2701-mmsys", "syscon";

		reg = <0 0x14000000 0 0x1000>;

		#clock-cells = <1>;

	};



	imgsys: syscon@15000000 {

		compatible = "mediatek,mt2701-imgsys", "syscon";

		reg = <0 0x15000000 0 0x1000>;

		#clock-cells = <1>;

	};



	vdecsys: syscon@16000000 {

		compatible = "mediatek,mt2701-vdecsys", "syscon";

		reg = <0 0x16000000 0 0x1000>;

		#clock-cells = <1>;

	};



	hifsys: syscon@1a000000 {

		compatible = "mediatek,mt2701-hifsys", "syscon";

		reg = <0 0x1a000000 0 0x1000>;

		#clock-cells = <1>;

	};



	ethsys: syscon@1b000000 {

		compatible = "mediatek,mt2701-ethsys", "syscon";

		reg = <0 0x1b000000 0 0x1000>;

		#clock-cells = <1>;

	};



	bdpsys: syscon@1c000000 {

		compatible = "mediatek,mt2701-bdpsys", "syscon";

		reg = <0 0x1c000000 0 0x1000>;

		#clock-cells = <1>;

	};

};