Loading drivers/gpu/drm/msm/sde/sde_crtc.c +28 −1 Original line number Diff line number Diff line Loading @@ -55,9 +55,13 @@ struct sde_crtc_custom_events { static int sde_crtc_power_interrupt_handler(struct drm_crtc *crtc_drm, bool en, struct sde_irq_callback *ad_irq); static int sde_crtc_pm_event_handler(struct drm_crtc *crtc_drm, bool en, struct sde_irq_callback *noirq); static struct sde_crtc_custom_events custom_events[] = { {DRM_EVENT_AD_BACKLIGHT, sde_cp_ad_interrupt}, {DRM_EVENT_CRTC_POWER, sde_crtc_power_interrupt_handler} {DRM_EVENT_CRTC_POWER, sde_crtc_power_interrupt_handler}, {DRM_EVENT_SDE_POWER, sde_crtc_pm_event_handler}, }; /* default input fence timeout, in ms */ Loading Loading @@ -2429,6 +2433,8 @@ static void sde_crtc_handle_power_event(u32 event_type, void *arg) struct drm_crtc *crtc = arg; struct sde_crtc *sde_crtc; struct drm_encoder *encoder; struct drm_event event; u32 power_on = 0; if (!crtc) { SDE_ERROR("invalid crtc\n"); Loading @@ -2449,6 +2455,11 @@ static void sde_crtc_handle_power_event(u32 event_type, void *arg) sde_encoder_virt_restore(encoder); } event.type = DRM_EVENT_SDE_POWER; event.length = sizeof(power_on); power_on = 1; msm_mode_object_event_notify(&crtc->base, crtc->dev, &event, (u8 *)&power_on); } else if (event_type == SDE_POWER_EVENT_POST_DISABLE) { struct drm_plane *plane; Loading @@ -2460,6 +2471,12 @@ static void sde_crtc_handle_power_event(u32 event_type, void *arg) sde_plane_set_revalidate(plane, true); sde_cp_crtc_suspend(crtc); event.type = DRM_EVENT_SDE_POWER; event.length = sizeof(power_on); power_on = 0; msm_mode_object_event_notify(&crtc->base, crtc->dev, &event, (u8 *)&power_on); } mutex_unlock(&sde_crtc->crtc_lock); Loading Loading @@ -3975,3 +3992,13 @@ static int sde_crtc_power_interrupt_handler(struct drm_crtc *crtc_drm, { return 0; } static int sde_crtc_pm_event_handler(struct drm_crtc *crtc, bool en, struct sde_irq_callback *noirq) { /* * IRQ object noirq is not being used here since there is * no crtc irq from pm event. */ return 0; } include/uapi/drm/msm_drm.h +1 −0 Original line number Diff line number Diff line Loading @@ -322,6 +322,7 @@ struct drm_msm_event_resp { #define DRM_EVENT_AD_BACKLIGHT 0x80000001 #define DRM_EVENT_CRTC_POWER 0x80000002 #define DRM_EVENT_SYS_BACKLIGHT 0x80000003 #define DRM_EVENT_SDE_POWER 0x80000004 #define DRM_IOCTL_MSM_GET_PARAM DRM_IOWR(DRM_COMMAND_BASE + DRM_MSM_GET_PARAM, struct drm_msm_param) #define DRM_IOCTL_MSM_GEM_NEW DRM_IOWR(DRM_COMMAND_BASE + DRM_MSM_GEM_NEW, struct drm_msm_gem_new) Loading Loading
drivers/gpu/drm/msm/sde/sde_crtc.c +28 −1 Original line number Diff line number Diff line Loading @@ -55,9 +55,13 @@ struct sde_crtc_custom_events { static int sde_crtc_power_interrupt_handler(struct drm_crtc *crtc_drm, bool en, struct sde_irq_callback *ad_irq); static int sde_crtc_pm_event_handler(struct drm_crtc *crtc_drm, bool en, struct sde_irq_callback *noirq); static struct sde_crtc_custom_events custom_events[] = { {DRM_EVENT_AD_BACKLIGHT, sde_cp_ad_interrupt}, {DRM_EVENT_CRTC_POWER, sde_crtc_power_interrupt_handler} {DRM_EVENT_CRTC_POWER, sde_crtc_power_interrupt_handler}, {DRM_EVENT_SDE_POWER, sde_crtc_pm_event_handler}, }; /* default input fence timeout, in ms */ Loading Loading @@ -2429,6 +2433,8 @@ static void sde_crtc_handle_power_event(u32 event_type, void *arg) struct drm_crtc *crtc = arg; struct sde_crtc *sde_crtc; struct drm_encoder *encoder; struct drm_event event; u32 power_on = 0; if (!crtc) { SDE_ERROR("invalid crtc\n"); Loading @@ -2449,6 +2455,11 @@ static void sde_crtc_handle_power_event(u32 event_type, void *arg) sde_encoder_virt_restore(encoder); } event.type = DRM_EVENT_SDE_POWER; event.length = sizeof(power_on); power_on = 1; msm_mode_object_event_notify(&crtc->base, crtc->dev, &event, (u8 *)&power_on); } else if (event_type == SDE_POWER_EVENT_POST_DISABLE) { struct drm_plane *plane; Loading @@ -2460,6 +2471,12 @@ static void sde_crtc_handle_power_event(u32 event_type, void *arg) sde_plane_set_revalidate(plane, true); sde_cp_crtc_suspend(crtc); event.type = DRM_EVENT_SDE_POWER; event.length = sizeof(power_on); power_on = 0; msm_mode_object_event_notify(&crtc->base, crtc->dev, &event, (u8 *)&power_on); } mutex_unlock(&sde_crtc->crtc_lock); Loading Loading @@ -3975,3 +3992,13 @@ static int sde_crtc_power_interrupt_handler(struct drm_crtc *crtc_drm, { return 0; } static int sde_crtc_pm_event_handler(struct drm_crtc *crtc, bool en, struct sde_irq_callback *noirq) { /* * IRQ object noirq is not being used here since there is * no crtc irq from pm event. */ return 0; }
include/uapi/drm/msm_drm.h +1 −0 Original line number Diff line number Diff line Loading @@ -322,6 +322,7 @@ struct drm_msm_event_resp { #define DRM_EVENT_AD_BACKLIGHT 0x80000001 #define DRM_EVENT_CRTC_POWER 0x80000002 #define DRM_EVENT_SYS_BACKLIGHT 0x80000003 #define DRM_EVENT_SDE_POWER 0x80000004 #define DRM_IOCTL_MSM_GET_PARAM DRM_IOWR(DRM_COMMAND_BASE + DRM_MSM_GET_PARAM, struct drm_msm_param) #define DRM_IOCTL_MSM_GEM_NEW DRM_IOWR(DRM_COMMAND_BASE + DRM_MSM_GEM_NEW, struct drm_msm_gem_new) Loading