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Commit 679f002c authored by Joakim Zhang's avatar Joakim Zhang Committed by Greg Kroah-Hartman
Browse files

can: flexcan: assert FRZ bit in flexcan_chip_freeze() 

commit 449052cfebf624b670faa040245d3feed770d22f upstream.

Assert HALT bit to enter freeze mode, there is a premise that FRZ bit is
asserted. This patch asserts FRZ bit in flexcan_chip_freeze, although
the reset value is 1b'1. This is a prepare patch, later patch will
invoke flexcan_chip_freeze() to enter freeze mode, which polling freeze
mode acknowledge.

Fixes: b1aa1c7a ("can: flexcan: fix transition from and to freeze mode in chip_{,un}freeze")
Link: https://lore.kernel.org/r/20210218110037.16591-2-qiangqing.zhang@nxp.com


Signed-off-by: default avatarJoakim Zhang <qiangqing.zhang@nxp.com>
Signed-off-by: default avatarMarc Kleine-Budde <mkl@pengutronix.de>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent fa2cdf77

drivers/net/can/flexcan.c

+1 −1
Original line number Diff line number Diff line
@@ -383,7 +383,7 @@ static int flexcan_chip_freeze(struct flexcan_priv *priv) 
	u32 reg;



	reg = flexcan_read(&regs->mcr);

	reg |= FLEXCAN_MCR_HALT;

	reg |= FLEXCAN_MCR_FRZ | FLEXCAN_MCR_HALT;

	flexcan_write(reg, &regs->mcr);



	while (timeout-- && !(flexcan_read(&regs->mcr) & FLEXCAN_MCR_FRZ_ACK))