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Commit 6771cbf9 authored by Daode Huang's avatar Daode Huang Committed by Doug Ledford
Browse files

net: hns: bug fix about setting coalsecs-usecs to 0 



When set rx/tx coalesce usecs to 0, the interrupt coalesce will be
disabled, but there is a interrupt rate limit which set to 1us, it
will cause no interrupt occurs. This patch disable interrupt limit
when sets coalsecs usecs to 0, and restores it to 1 in other case.

Signed-off-by: default avatarDaode Huang <huangdaode@hisilicon.com>
Reviewed-by: default avatarYisen Zhuang <yisen.zhuang@huawei.com>
Signed-off-by: default avatarSalil Mehta <salil.mehta@huawei.com>
Signed-off-by: default avatarDoug Ledford <dledford@redhat.com>
parent 0e97cd4e

drivers/net/ethernet/hisilicon/hns/hns_dsaf_rcb.c

+16 −0
Original line number Diff line number Diff line
@@ -543,6 +543,22 @@ int hns_rcb_set_coalesce_usecs( 
			"error: coalesce_usecs setting supports 0~1023us\n");

		return -EINVAL;

	}



	if (!AE_IS_VER1(rcb_common->dsaf_dev->dsaf_ver)) {

		if (timeout == 0)

			/* set timeout to 0, Disable gap time */

			dsaf_set_reg_field(rcb_common->io_base,

					   RCB_INT_GAP_TIME_REG + port_idx * 4,

					   PPE_INT_GAPTIME_M, PPE_INT_GAPTIME_B,

					   0);

		else

			/* set timeout non 0, restore gap time to 1 */

			dsaf_set_reg_field(rcb_common->io_base,

					   RCB_INT_GAP_TIME_REG + port_idx * 4,

					   PPE_INT_GAPTIME_M, PPE_INT_GAPTIME_B,

					   1);

	}



	hns_rcb_set_port_timeout(rcb_common, port_idx, timeout);

	return 0;

}

drivers/net/ethernet/hisilicon/hns/hns_dsaf_reg.h

+4 −0
Original line number Diff line number Diff line
@@ -417,6 +417,7 @@ 
#define RCB_CFG_OVERTIME_REG			0x9300

#define RCB_CFG_PKTLINE_INT_NUM_REG		0x9304

#define RCB_CFG_OVERTIME_INT_NUM_REG		0x9308

#define RCB_INT_GAP_TIME_REG			0x9400

#define RCB_PORT_CFG_OVERTIME_REG		0x9430



#define RCB_RING_RX_RING_BASEADDR_L_REG		0x00000
@@ -898,6 +899,9 @@ 
#define PPE_CNT_CLR_CE_B	0

#define PPE_CNT_CLR_SNAP_EN_B	1



#define PPE_INT_GAPTIME_B	0

#define PPE_INT_GAPTIME_M	0x3ff



#define PPE_COMMON_CNT_CLR_CE_B	0

#define PPE_COMMON_CNT_CLR_SNAP_EN_B	1

#define RCB_COM_TSO_MODE_B	0