iommu: arm-smmu: use correct SHCFG shift for sCR0



Fix Commit 7f377fe3 ("iommu: arm-smmu: Disable io-coherency in bypass
mode").
Use correct SHCFG register shift value for sCR0 register.

Change-Id: Ib25de9866a7015f56456d7d0ee4a036f21f77896
Signed-off-by: Prakash Gupta <guptap@codeaurora.org>

parent 76913944

drivers/iommu/arm-smmu.c

+1 −1

Original line number	Diff line number	Diff line
		@@ -3526,7 +3526,7 @@ static void arm_smmu_device_reset(struct arm_smmu_device *smmu)

		/* Force bypass transaction to be Non-Shareable & not io-coherent */
		reg &= ~(sCR0_SHCFG_MASK << sCR0_SHCFG_SHIFT);
		reg \|= sCR0_SHCFG_NSH;
		reg \|= sCR0_SHCFG_NSH << sCR0_SHCFG_SHIFT;

		/* Push the button */
		__arm_smmu_tlb_sync(smmu);