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Commit 66bc2cab authored by Paulo Zanoni's avatar Paulo Zanoni Committed by Daniel Vetter
Browse files

drm/i915: BDW can also detect unclaimed registers 



By the time I wrote this patch, it allowed me to catch some problems.
But due to patch reordering - in order to prevent fake "regression"
reports - this patch may be merged after the fixes of the problems
identified by this patch.

Reviewed-by: default avatarRodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: default avatarPaulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent 5978118c

drivers/gpu/drm/i915/i915_drv.c

+4 −0
Original line number Diff line number Diff line
@@ -303,6 +303,7 @@ static const struct intel_device_info intel_broadwell_d_info = { 
	.ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING,

	.has_llc = 1,

	.has_ddi = 1,

	.has_fpga_dbg = 1,

	.has_fbc = 1,

	GEN_DEFAULT_PIPEOFFSETS,

	IVB_CURSOR_OFFSETS,
@@ -314,6 +315,7 @@ static const struct intel_device_info intel_broadwell_m_info = { 
	.ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING,

	.has_llc = 1,

	.has_ddi = 1,

	.has_fpga_dbg = 1,

	.has_fbc = 1,

	GEN_DEFAULT_PIPEOFFSETS,

	IVB_CURSOR_OFFSETS,
@@ -325,6 +327,7 @@ static const struct intel_device_info intel_broadwell_gt3d_info = { 
	.ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING | BSD2_RING,

	.has_llc = 1,

	.has_ddi = 1,

	.has_fpga_dbg = 1,

	.has_fbc = 1,

	GEN_DEFAULT_PIPEOFFSETS,

	IVB_CURSOR_OFFSETS,
@@ -336,6 +339,7 @@ static const struct intel_device_info intel_broadwell_gt3m_info = { 
	.ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING | BSD2_RING,

	.has_llc = 1,

	.has_ddi = 1,

	.has_fpga_dbg = 1,

	.has_fbc = 1,

	GEN_DEFAULT_PIPEOFFSETS,

	IVB_CURSOR_OFFSETS,

drivers/gpu/drm/i915/intel_uncore.c

+3 −0
Original line number Diff line number Diff line
@@ -747,6 +747,7 @@ static bool is_gen8_shadowed(struct drm_i915_private *dev_priv, u32 reg) 
static void \

gen8_write##x(struct drm_i915_private *dev_priv, off_t reg, u##x val, bool trace) { \

	REG_WRITE_HEADER; \

	hsw_unclaimed_reg_debug(dev_priv, reg, false, true); \

	if (reg < 0x40000 && !is_gen8_shadowed(dev_priv, reg)) { \

		if (dev_priv->uncore.forcewake_count == 0) \

			dev_priv->uncore.funcs.force_wake_get(dev_priv,	\
@@ -758,6 +759,8 @@ gen8_write##x(struct drm_i915_private *dev_priv, off_t reg, u##x val, bool trace 
	} else { \

		__raw_i915_write##x(dev_priv, reg, val); \

	} \

	hsw_unclaimed_reg_debug(dev_priv, reg, false, false); \

	hsw_unclaimed_reg_detect(dev_priv); \

	REG_WRITE_FOOTER; \

}