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Commit 66555406 authored by Deepak Katragadda's avatar Deepak Katragadda
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clk: qcom: Update the FMAX corners for clocks on SDM845 and SDM670 



Update the fixup functions for SDM845 v2 and SDM670 to reflect
changes in the frequency plan.

Change-Id: Ie20d75197444ad90931f6410d278b591bece5ba4
Signed-off-by: default avatarDeepak Katragadda <dkatraga@codeaurora.org>
parent 51c75b62

drivers/clk/qcom/camcc-sdm845.c

+4 −0
Original line number Diff line number Diff line
@@ -1973,6 +1973,7 @@ static void cam_cc_sdm845_fixup_sdm845v2(void) 
		&cam_cc_csi3phytimer_clk_src.clkr;

	cam_cc_cphy_rx_clk_src.freq_tbl = ftbl_cam_cc_cphy_rx_clk_src_sdm845_v2;

	cam_cc_cphy_rx_clk_src.clkr.hw.init->rate_max[VDD_CX_LOWER] = 384000000;

	cam_cc_cphy_rx_clk_src.clkr.hw.init->rate_max[VDD_CX_LOW] = 384000000;

	cam_cc_fd_core_clk_src.freq_tbl = ftbl_cam_cc_fd_core_clk_src_sdm845_v2;

	cam_cc_fd_core_clk_src.clkr.hw.init->rate_max[VDD_CX_LOWER] = 384000000;

	cam_cc_icp_clk_src.freq_tbl = ftbl_cam_cc_icp_clk_src_sdm845_v2;
@@ -1985,6 +1986,9 @@ static void cam_cc_sdm845_fixup_sdm845v2(void) 
	cam_cc_lrme_clk_src.clkr.hw.init->rate_max[VDD_CX_LOW_L1] = 320000000;

	cam_cc_lrme_clk_src.clkr.hw.init->rate_max[VDD_CX_NOMINAL] = 400000000;

	cam_cc_slow_ahb_clk_src.clkr.hw.init->rate_max[VDD_CX_LOWER] = 80000000;

	cam_cc_slow_ahb_clk_src.clkr.hw.init->rate_max[VDD_CX_LOW] = 80000000;

	cam_cc_slow_ahb_clk_src.clkr.hw.init->rate_max[VDD_CX_LOW_L1] =

		80000000;

}



static void cam_cc_sdm845_fixup_sdm670(void)

drivers/clk/qcom/dispcc-sdm845.c

+11 −3
Original line number Diff line number Diff line
@@ -1040,13 +1040,13 @@ static void disp_cc_sdm845_fixup_sdm845v2(struct regmap *regmap) 
	disp_cc_mdss_byte0_clk_src.clkr.hw.init->rate_max[VDD_CX_LOW] =

		275000000;

	disp_cc_mdss_byte0_clk_src.clkr.hw.init->rate_max[VDD_CX_LOW_L1] =

		358000000;

		328580000;

	disp_cc_mdss_byte1_clk_src.clkr.hw.init->rate_max[VDD_CX_LOWER] =

		180000000;

	disp_cc_mdss_byte1_clk_src.clkr.hw.init->rate_max[VDD_CX_LOW] =

		275000000;

	disp_cc_mdss_byte1_clk_src.clkr.hw.init->rate_max[VDD_CX_LOW_L1] =

		358000000;

		328580000;

	disp_cc_mdss_dp_pixel1_clk_src.clkr.hw.init->rate_max[VDD_CX_LOW] =

		337500;

	disp_cc_mdss_dp_pixel_clk_src.clkr.hw.init->rate_max[VDD_CX_LOW] =
@@ -1063,10 +1063,14 @@ static void disp_cc_sdm845_fixup_sdm845v2(struct regmap *regmap) 
		280000000;

	disp_cc_mdss_pclk0_clk_src.clkr.hw.init->rate_max[VDD_CX_LOW] =

		430000000;

	disp_cc_mdss_pclk0_clk_src.clkr.hw.init->rate_max[VDD_CX_LOW_L1] =

		430000000;

	disp_cc_mdss_pclk1_clk_src.clkr.hw.init->rate_max[VDD_CX_LOWER] =

		280000000;

	disp_cc_mdss_pclk1_clk_src.clkr.hw.init->rate_max[VDD_CX_LOW] =

		430000000;

	disp_cc_mdss_pclk1_clk_src.clkr.hw.init->rate_max[VDD_CX_LOW_L1] =

		430000000;

	disp_cc_mdss_rot_clk_src.freq_tbl =

		ftbl_disp_cc_mdss_rot_clk_src_sdm845_v2;

	disp_cc_mdss_rot_clk_src.clkr.hw.init->rate_max[VDD_CX_LOWER] =
@@ -1083,6 +1087,10 @@ static void disp_cc_sdm845_fixup_sdm670(struct regmap *regmap) 


	disp_cc_mdss_mdp_clk_src.freq_tbl =

		ftbl_disp_cc_mdss_mdp_clk_src_sdm670;

	disp_cc_mdss_byte0_clk_src.clkr.hw.init->rate_max[VDD_CX_LOW_L1] =

		358000000;

	disp_cc_mdss_byte1_clk_src.clkr.hw.init->rate_max[VDD_CX_LOW_L1] =

		358000000;

}



static int disp_cc_sdm845_fixup(struct platform_device *pdev,

drivers/clk/qcom/gcc-sdm845.c

+6 −7
Original line number Diff line number Diff line
@@ -4180,6 +4180,7 @@ static void gcc_sdm845_fixup_sdm845v2(void) 
		240000000;

	gcc_ufs_phy_axi_clk_src.freq_tbl =

		ftbl_gcc_ufs_card_axi_clk_src_sdm845_v2;

	gcc_vsensor_clk_src.clkr.hw.init->rate_max[VDD_CX_LOW] = 600000000;

}



static void gcc_sdm845_fixup_sdm670(void)
@@ -4251,15 +4252,13 @@ static void gcc_sdm845_fixup_sdm670(void) 
	gcc_cpuss_rbcpr_clk_src.freq_tbl = ftbl_gcc_cpuss_rbcpr_clk_src_sdm670;

	gcc_cpuss_rbcpr_clk_src.clkr.hw.init->rate_max[VDD_CX_NOMINAL] =

		50000000;

	gcc_sdcc2_apps_clk_src.clkr.hw.init->rate_max[VDD_CX_LOWER] =

					50000000;

	gcc_sdcc2_apps_clk_src.clkr.hw.init->rate_max[VDD_CX_LOWER] = 50000000;

	gcc_sdcc2_apps_clk_src.clkr.hw.init->rate_max[VDD_CX_LOW_L1] =

		100000000;

	gcc_sdcc2_apps_clk_src.clkr.hw.init->rate_max[VDD_CX_NOMINAL] =

		201500000;

	gcc_sdcc4_apps_clk_src.freq_tbl = ftbl_gcc_sdcc4_apps_clk_src_sdm670;

	gcc_sdcc4_apps_clk_src.clkr.hw.init->rate_max[VDD_CX_LOWER] =

					33333333;

	gcc_sdcc4_apps_clk_src.clkr.hw.init->rate_max[VDD_CX_LOWER] = 33333333;

}



static int gcc_sdm845_fixup(struct platform_device *pdev)

drivers/clk/qcom/gpucc-sdm845.c

+14 −17
Original line number Diff line number Diff line
@@ -631,7 +631,7 @@ static void gpu_cc_sdm845_fixup_sdm670(struct regmap *regmap) 
	clk_fabia_pll_configure(&gpu_cc_pll1, regmap, &gpu_cc_pll1_config);



	gpu_cc_gmu_clk_src.freq_tbl = ftbl_gpu_cc_gmu_clk_src_sdm670;

	gpu_cc_gmu_clk_src.clkr.hw.init->rate_max[VDD_CX_LOW] = 0;

	gpu_cc_gmu_clk_src.clkr.hw.init->rate_max[VDD_CX_LOW] = 200000000;

}



static void gpu_cc_gfx_sdm845_fixup_sdm845v2(void)
@@ -657,20 +657,17 @@ static void gpu_cc_gfx_sdm845_fixup_sdm670(void) 
{

	gpu_cc_gx_gfx3d_clk_src.freq_tbl =

				ftbl_gpu_cc_gx_gfx3d_clk_src_sdm670;

	gpu_cc_gx_gfx3d_clk_src.clkr.hw.init->rate_max[VDD_GX_MIN] =

				180000000;

	gpu_cc_gx_gfx3d_clk_src.clkr.hw.init->rate_max[VDD_GX_MIN] = 180000000;

	gpu_cc_gx_gfx3d_clk_src.clkr.hw.init->rate_max[VDD_GX_LOWER] =

		267000000;

	gpu_cc_gx_gfx3d_clk_src.clkr.hw.init->rate_max[VDD_GX_LOW] =

				355000000;

	gpu_cc_gx_gfx3d_clk_src.clkr.hw.init->rate_max[VDD_GX_LOW] = 355000000;

	gpu_cc_gx_gfx3d_clk_src.clkr.hw.init->rate_max[VDD_GX_LOW_L1] =

		430000000;

	gpu_cc_gx_gfx3d_clk_src.clkr.hw.init->rate_max[VDD_GX_NOMINAL] =

		565000000;

	gpu_cc_gx_gfx3d_clk_src.clkr.hw.init->rate_max[VDD_GX_NOMINAL_L1] =

		650000000;

	gpu_cc_gx_gfx3d_clk_src.clkr.hw.init->rate_max[VDD_GX_HIGH] =

				750000000;

	gpu_cc_gx_gfx3d_clk_src.clkr.hw.init->rate_max[VDD_GX_HIGH] = 750000000;

	gpu_cc_gx_gfx3d_clk_src.clkr.hw.init->rate_max[VDD_GX_HIGH_L1] =

		780000000;

}