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Commit 663bacef authored by John David Anglin's avatar John David Anglin Committed by Greg Kroah-Hartman
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parisc: Use implicit space register selection for loading the coherence index of I/O pdirs 



commit 63923d2c3800919774f5c651d503d1dd2adaddd5 upstream.

We only support I/O to kernel space. Using %sr1 to load the coherence
index may be racy unless interrupts are disabled. This patch changes the
code used to load the coherence index to use implicit space register
selection. This saves one instruction and eliminates the race.

Tested on rp3440, c8000 and c3750.

Signed-off-by: default avatarJohn David Anglin <dave.anglin@bell.net>
Cc: stable@vger.kernel.org
Signed-off-by: default avatarHelge Deller <deller@gmx.de>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 0b1a2360

drivers/parisc/ccio-dma.c

+1 −3
Original line number Diff line number Diff line
@@ -563,8 +563,6 @@ ccio_io_pdir_entry(u64 *pdir_ptr, space_t sid, unsigned long vba, 
	/* We currently only support kernel addresses */

	BUG_ON(sid != KERNEL_SPACE);



	mtsp(sid,1);



	/*

	** WORD 1 - low order word

	** "hints" parm includes the VALID bit!
@@ -595,7 +593,7 @@ ccio_io_pdir_entry(u64 *pdir_ptr, space_t sid, unsigned long vba, 
	** Grab virtual index [0:11]

	** Deposit virt_idx bits into I/O PDIR word

	*/

	asm volatile ("lci %%r0(%%sr1, %1), %0" : "=r" (ci) : "r" (vba));

	asm volatile ("lci %%r0(%1), %0" : "=r" (ci) : "r" (vba));

	asm volatile ("extru %1,19,12,%0" : "+r" (ci) : "r" (ci));

	asm volatile ("depw  %1,15,12,%0" : "+r" (pa) : "r" (ci));

drivers/parisc/sba_iommu.c

+1 −2
Original line number Diff line number Diff line
@@ -573,8 +573,7 @@ sba_io_pdir_entry(u64 *pdir_ptr, space_t sid, unsigned long vba, 
	pa = virt_to_phys(vba);

	pa &= IOVP_MASK;



	mtsp(sid,1);

	asm("lci 0(%%sr1, %1), %0" : "=r" (ci) : "r" (vba));

	asm("lci 0(%1), %0" : "=r" (ci) : "r" (vba));

	pa |= (ci >> PAGE_SHIFT) & 0xff;  /* move CI (8 bits) into lowest byte */



	pa |= SBA_PDIR_VALID_BIT;	/* set "valid" bit */