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Commit 65993d64 authored by Jesse Barnes's avatar Jesse Barnes Committed by Chris Wilson
Browse files

drm/i915: don't enable plane, pipe and PLL prematurely 



On Ironlake+ we need to enable these in a specific order.

Signed-off-by: default avatarJesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
parent 01fe9dbd

drivers/gpu/drm/i915/intel_display.c

+5 −3
Original line number Diff line number Diff line
@@ -4222,9 +4222,11 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc, 
			pipeconf &= ~PIPECONF_DOUBLE_WIDE;

	}



	if (!HAS_PCH_SPLIT(dev)) {

		dspcntr |= DISPLAY_PLANE_ENABLE;

		pipeconf |= PIPECONF_ENABLE;

		dpll |= DPLL_VCO_ENABLE;

	}



	DRM_DEBUG_KMS("Mode for pipe %c:\n", pipe == 0 ? 'A' : 'B');

	drm_mode_debug_printmodeline(mode);