Commit 650f1567 authored Jun 17, 2011 by Jeff Ohlstein Committed by David Brown Jun 17, 2011

msm: timer: compensate for timer shift in msm_read_timer_count

Some msm targets have timers whose lower bits are unreliable. So, we
present our timers as lower frequency than they actually are, and ignore
the bottom 5 bits on such targets. This compensation was erroneously
removed from the msm_read_timer_count function, so restore it.

This was broken by 94790ec2 "msm: timer: SMP timer support for msm".

Signed-off-by: Jeff Ohlstein <johlstei@codeaurora.org>

parent ebf30dc9

arch/arm/mach-msm/timer.c

+5 −1

Original line number	Diff line number	Diff line
		@@ -102,7 +102,11 @@ static cycle_t msm_read_timer_count(struct clocksource *cs)
		{
		struct msm_clock *clk = container_of(cs, struct msm_clock, clocksource);

		return readl(clk->global_counter);
		/*
		* Shift timer count down by a constant due to unreliable lower bits
		* on some targets.
		*/
		return readl(clk->global_counter) >> clk->shift;
		}

		static struct msm_clock clockevent_to_clock(struct clock_event_device evt)